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    Interconnect area, delay and area-delay optimization for multi-level signaling on-chip bus

    Interconnect area, delay and area-delay optimization for multi-level signaling on-chip bus by Mai, Yoong Ching, Ang, Tun Boon, Chin, Kock Yeong, Rokhani, Fakhrul Zaman

    Published 2010
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    Conference or Workshop Item

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