LOW POWER AND IMPROVED SPEED 1T DRAM USING DYNAMIC LOGIC 由 T. NIRMALRAJ, S. K. PANDIYAN, C. SENTHILPARI

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IMPROVED SPEED LOW POWER AND LOW VOLTAGE SRAM DESIGN FOR LDPC APPLICATION CIRCUITS 由 ROSALIND DEENA KUMARI SELVAM, C. SENTHILPARI, LEE LINI

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DESIGN OF LOW EPI AND HIGH THROUGHPUT CORDIC CELL TO IMPROVE THE PERFORMANCE OF MOBILE ROBOT 由 P. VELRAJKUMAR, C. SENTHILPARI, G. RAMANAMURTHY, EK WONG

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Low Power and Improved Speed Montgomery Multiplier using Universal Building Blocks 由 P. Velrajkumar, C. Senthilpari, J. Sheela Francisca, T. Nirmal Raj

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Layout parameter analysis in Shannon expansion theorem based on 32 bit adder circuit 由 C. Senthilpari, K. Diwakar, Kumar Munusamy, J. Sheela Francisca

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A low power, highly efficient, linear, enhanced wideband Class-J mode power amplifier for 5G applications 由 Nagisetty Sridhar, C. Senthilpari, R. Mardeni, Wong Hin Yong, T. Nandhakumar

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A NOVEL DESIGN OF MULTIPLEXER BASED FULL-ADDER CELL FOR POWER AND PROPAGATION DELAY OPTIMIZATIONS 由 G. RAMANA MURTHY, C. SENTHILPARI, P. VELRAJKUMAR, LIM TIEN SZE

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The Design of Low Power Op-amp for Biomedical Application 由 Ameerul Asyraf Nasir, Chu Liang Lee, Kah Yoong Chan, Lini Lee, C Senthilpari

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