Showing 1 - 3 results of 3 for search 'Chia-Tung Ho', query time: 0.02s Refine Results
  1. 1
    Multirow Complementary-FET (CFET) Standard Cell Synthesis Framework Using Satisfiability Modulo Theories (SMTs)

    Multirow Complementary-FET (CFET) Standard Cell Synthesis Framework Using Satisfiability Modulo Theories (SMTs) by Chung-Kuan Cheng, Chia-Tung Ho, Daeyeal Lee, Bill Lin

    Published 2021-01-01
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    Article
  2. 2
    Monolithic 3D Semiconductor Footprint Scaling Exploration Based on VFET Standard Cell Layout Methodology, Design Flow, and EDA Platform

    Monolithic 3D Semiconductor Footprint Scaling Exploration Based on VFET Standard Cell Layout Methodology, Design Flow, and EDA Platform by Chung-Kuan Cheng, Chia-Tung Ho, Daeyeal Lee, Bill Lin

    Published 2022-01-01
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  3. 3
    Many-Tier Vertical Gate-All-Around Nanowire FET Standard Cell Synthesis for Advanced Technology Nodes

    Many-Tier Vertical Gate-All-Around Nanowire FET Standard Cell Synthesis for Advanced Technology Nodes by Daeyeal Lee, Chia-Tung Ho, Ilgweon Kang, Sicun Gao, Bill Lin, Chung-Kuan Cheng

    Published 2021-01-01
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