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Chintaiah Nannepaga
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Chintaiah Nannepaga
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Chintaiah Nannepaga
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1
Conditional spatial transition reduction data encoding technique for VLSI interconnects
by
J. Snehalatha
,
Chintaiah Nannepaga
,
Sivasubramanyam Medasani
,
Bujjibabu Nannepaga
,
Katepogu Rajkumar
Published 2024-03-01
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2
Low power and compact architecture of sector transition reduction encoding technique
by
J. Sneha Latha
,
Chintaiah Nannepaga
,
Katepogu Rajkumar
,
Bujjibabu Nannepaga
,
Kranthi Kumar Andhe
Published 2023-12-01
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