RAELLA: Reforming the Arithmetic for Efficient, Low-Resolution, and Low-Loss Analog PIM: No Retraining Required! by Andrulis, Tanner, Emer, Joel, Sze, Vivienne

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Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks by Chen, Yu-Hsin, Emer, Joel S., Sze, Vivienne

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Accelergy: An Architecture-Level Energy Estimation Methodology for Accelerator Designs by Wu, Yannan Nellie, Emer, Joel S, Sze, Vivienne

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Using Dataflow to Optimize Energy Efficiency of Deep Neural Network Accelerators by Chen, Yu-Hsin, Emer, Joel S, Sze, Vivienne

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An Architecture-Level Energy and Area Estimator for Processing-In-Memory Accelerator Designs by Wu, Yannan Nellie, Sze, Vivienne, Emer, Joel S.

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GAMMA: Leveraging Gustavson's Algorithm to Accelerate Sparse Matrix Multiplication by Zhang, Guowei, Attaluri, Nithya, Emer, Joel, Sanchez, Daniel

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WACO: Learning Workload-Aware Co-optimization of the Format and Schedule of a Sparse Tensor Program by Won, Jaeyeon, Mendis, Charith, Emer, Joel, Amarasinghe, Saman

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SecureLoop: Design Space Exploration of Secure DNN Accelerators by Lee, Kyungmi, Yan, Mengjia, Emer, Joel, Chandrakasan, Anantha

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Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks by Chen, Yu-Hsin, Krishna, Tushar, Emer, Joel S., Sze, Vivienne

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Leveraging latency-insensitivity to ease multiple FPGA design by Fleming, Kermin Elliott, Pellauer, Michael, Arvind, Arvind, Emer, Joel S

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Tailors: Accelerating Sparse Tensor Algebra by Overbooking Buffer Capacity by Xue, Zi Yu, Wu, Yannan, Emer, Joel, Sze, Vivienne

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Soft connections: Addressing the hardware-design modularity problem by Pellauer, Michael Ignatius, Emer, Joel S., Adler, Michael, Chiou, Derek

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A method to estimate the energy consumption of deep neural networks by Yang, Tien-Ju, Chen, Yu-Hsin, Emer, Joel S, Sze, Vivienne

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How to Evaluate Deep Neural Network Processors: TOPS/W (Alone) Considered Harmful by Sze, Vivienne, Chen, Yu-Hsin, Yang, Tien-Ju, Emer, Joel S

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Eyeriss v2: A Flexible Accelerator for Emerging Deep Neural Networks on Mobile Devices by Chen, Yu-Hsin, Yang, Tien-Ju, Emer, Joel S, Sze, Vivienne

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Efficient Processing of Deep Neural Networks: A Tutorial and Survey by Sze, Vivienne, Chen, Yu-Hsin, Yang, Tien-Ju, Emer, Joel S

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Towards Closing the Energy Gap Between HOG and CNN Features for Embedded Vision by Suleiman, Amr AbdulZahir, Chen, Yu-Hsin, Emer, Joel S, Sze, Vivienne

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A scalable architecture for ordered parallelism by Emer, Joel, Jeffrey, Mark Christopher, Subramanian, Suvinay, Yan, Cong, Sanchez, Daniel

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Towards closing the energy gap between HOG and CNN features for embedded vision by Suleiman, Amr AbdulZahir, Chen, Yu-Hsin, Emer, Joel S, Sze, Vivienne

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Metior: A Comprehensive Model to Evaluate Obfuscating Side-Channel Defense Schemes by Deutsch, Peter, Na, Weon Taek, Bourgeat, Thomas, Emer, Joel, Yan, Mengjia

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