Showing 1 - 20 results of 24 for search 'Husin, Nasir', query time: 0.04s Refine Results
  1. 1
    Sub-micron technology development and system-on-chip (Soc) design - data compression core

    Sub-micron technology development and system-on-chip (Soc) design - data compression core by Husin, Nasir Sheikh

    Published 2002
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    Monograph
  2. 2
    Optimization of routing algorithm for interconnect delay in ultra large scale interation designs

    Optimization of routing algorithm for interconnect delay in ultra large scale interation designs by Husin, Nasir Shaikh

    Published 2008
    Thesis
  3. 3
    An empirical evaluation of topologies for large scale NoC

    An empirical evaluation of topologies for large scale NoC by Baboli, Mehdi, Shaikh Husin, Nasir

    Published 2014
    Article
  4. 4
    Mengenali jalan beriman kepada Allah Taala (tuhan al-Majid) : (Usulut tauhid) /

    Mengenali jalan beriman kepada Allah Taala (tuhan al-Majid) : (Usulut tauhid) / by Husin Nasir Mohd. Thaibul, Amdan Hamid

    Published 2008
  5. 5
    Pulse Coded Neural Network Implementation In VLSI

    Pulse Coded Neural Network Implementation In VLSI by Shaikh-Husin, Nasir, Chang, Wooi Po

    Published 2000
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    Article
  6. 6
    Simultaneous routing and buffer insertion algorithm for minimizing interconnect delay in VLSI layout design

    Simultaneous routing and buffer insertion algorithm for minimizing interconnect delay in VLSI layout design by Husin, Nasir Shaikh, Hani , Mohamed Khalil

    Published 2008
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    Book Section
  7. 7
    An optimization algorithm based on grid-graphs for minimizing interconnect delay in VLSI layout design

    An optimization algorithm based on grid-graphs for minimizing interconnect delay in VLSI layout design by Mohd. Hani, Mohamed Khalil, Shaikh Husin, Nasir

    Published 2009
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    Article
  8. 8
    Survey on multi field packet classification techniques

    Survey on multi field packet classification techniques by Al-Nejadi, Ammar Yahya Daeef, Shaikh Husin, Nasir

    Published 2015
    Article
  9. 9
    Algorithm to convert signal interpreted petri net models to programmable logic controller ladder logic diagram models

    Algorithm to convert signal interpreted petri net models to programmable logic controller ladder logic diagram models by Aspar, Z., Shaikh Husin, Nasir, Hani, M. Khalil

    Published 2018
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    Article
  10. 10
    Accurate and compact stochastic computations by exploiting correlation

    Accurate and compact stochastic computations by exploiting correlation by Abdellatef, Hamdan, Hani, Mohamed Khalil, Husin, Nasir Shaikh

    Published 2019
    Article
  11. 11
    FPGA Implementation of RSA Public-Key Cryptographic Coprocessor

    FPGA Implementation of RSA Public-Key Cryptographic Coprocessor by Hani, Mohamed Khalil, Shaikh-Husin, Nasir, Tan, Siang Lin

    Published 2000
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    Article
  12. 12
    FPGA implementation of RANSAC algorithm for real-time image geometry estimation

    FPGA implementation of RANSAC algorithm for real-time image geometry estimation by Tang, Jia Wei, Shaikh Husin, Nasir, Sheikh, Usman Ullah

    Published 2014
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    Conference or Workshop Item
  13. 13
    Design of voltage mode electronically tunable first order all pass filter in ±0.7 V 16 nm CNFET technology

    Design of voltage mode electronically tunable first order all pass filter in ±0.7 V 16 nm CNFET technology by Masud, Muhammad, A’ain, Abu, Khan, Iqbal, Husin, Nasir

    Published 2019
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    Article
  14. 14
    Stochastic computing correlation utilization in convolutional neural network basic functions

    Stochastic computing correlation utilization in convolutional neural network basic functions by Abdellatef, Hamdan, Hani, Mohamed Khalil, Husin, Nasir Shaikh, Ayat, Sayed Omid

    Published 2018
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    Article
  15. 15
    Low-area and accurate inner product and digital filters based on stochastic computing

    Low-area and accurate inner product and digital filters based on stochastic computing by Abdellatef, Hamdan, Khalil-Hani, Mohamed, Shaikh-Husin, Nasir, Omid Ayat, Sayed

    Published 2021
    Article
  16. 16
    Iterative RLC models for interconnect delay optimization in VLSI routing algorithms

    Iterative RLC models for interconnect delay optimization in VLSI routing algorithms by Md. Yusof , Zulkifli, Hani, Mohamed Khalil, Shaikh Husin, Nasir, Marsono, Muhammad Nadzir

    Published 2008
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    Book Section
  17. 17
    FPGA-based real-time moving target detection system for unmanned aerial vehicle application

    FPGA-based real-time moving target detection system for unmanned aerial vehicle application by Tang, Jia Wei, Shaikh-Husin, Nasir, Sheikh, Usman Ullah, Marsono, Muhammad Nadzir

    Published 2016
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    Article
  18. 18
    A linked list run-length-based single-pass connected component analysis for real-time embedded hardware

    A linked list run-length-based single-pass connected component analysis for real-time embedded hardware by Tang, Jia Wei, Shaikh-Husin, Nasir, Sheikh, Usman Ullah, Marsono, Muhammad Nadzir

    Published 2016
    Article
  19. 19
    Nano-scale VLSI clock routing module based on useful-skew tree algorithm

    Nano-scale VLSI clock routing module based on useful-skew tree algorithm by Eik Wee, Chew, Heng Sun, Ch'ng, Shaikh-Husin, Nasir, Hani, Mohamed Khalil

    Published 2006
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    Article
  20. 20
    Accelerating graph algorithms with priority queue processor

    Accelerating graph algorithms with priority queue processor by Heng Sun, Ch'ng, Eik Wee, Chew, Shaikh-Husin, Nasir, Hani, Mohamed Khalil

    Published 2006
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    Article

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