Threshold-guided design and optimization for Harris corner detector architecture by Jasani, Bhavan Ashwin, Lam, Siew-Kei, Meher, Pramod Kumar, Wu, Meiqing

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Data-path unrolling with logic folding for area-time-efficient FPGA-based FAST corner detector by Lam, Siew-Kei, Lim, Teck Chuan, Wu, Meiqing, Cao, Bin, Jasani, Bhavan Ashwin

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