検索結果 1 - 6 結果 / 6 検索語 'LUYang-jian(卢仰坚)', 処理時間: 0.03秒 結果の絞り込み
  1. 1
    Hardware mechanism for redundancy restraint and the analysis of their working procedure(冗余抑制的硬件实现及作用过程分析)

    Hardware mechanism for redundancy restraint and the analysis of their working procedure(冗余抑制的硬件实现及作用过程分析) 著者: WUXun-wei(吴训威), LUYang-jian(卢仰坚)

    出版事項 2001-09-01
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  2. 2
    Logic design of priority encoder by restraining redundancy(抑制冗余优先编码器的逻辑设计)

    Logic design of priority encoder by restraining redundancy(抑制冗余优先编码器的逻辑设计) 著者: LUYang-jian(卢仰坚), WUXun-wei(吴训威)

    出版事項 2001-07-01
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  3. 3
    Behavior sequence and technique of generation based on multiple-valued logic(行为序列及基于多值逻辑的产生技术)

    Behavior sequence and technique of generation based on multiple-valued logic(行为序列及基于多值逻辑的产生技术) 著者: LUYang-jian(卢仰坚), WUXun-wei(吴训威)

    出版事項 2001-01-01
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  4. 4
    Research on multivalued pulse circuits based on Schmitt circuits(基于施密特电路的多值脉冲电路研究)

    Research on multivalued pulse circuits based on Schmitt circuits(基于施密特电路的多值脉冲电路研究) 著者: WANGPeng-jun(汪鹏君), HUJian-ping(胡建平), LUYang-jian(卢仰坚)

    出版事項 2003-09-01
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  5. 5
    Characteristics detection and generation of ternary sequences(三值序列的特征检测及其产生)

    Characteristics detection and generation of ternary sequences(三值序列的特征检测及其产生) 著者: WUXun-wei(吴训威), LUYang-jian(卢仰坚), XIAYin-shui(夏银水)

    出版事項 2001-07-01
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  6. 6
    Low power serial magnitude comparator based on the Clock-Gating technique(基于门控技术的低功耗串行比较器)

    Low power serial magnitude comparator based on the Clock-Gating technique(基于门控技术的低功耗串行比较器) 著者: LUYang-jian(卢仰坚), WUXun-wei(吴训威), WangPeng-jun(汪鹏君)

    出版事項 2002-07-01
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