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Design of memory controllers and input/output controller for low-voltage asynchronous digital signal processor by Low, Joshua Yung Lih.
Published 2009
Final Year Project (FYP) -
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Efficient architectures for computation of binary logarithm by Low, Joshua Yung Lih
Published 2014
Thesis -
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A full current-mode sense amplifier for low-power SRAM applications by Do, Anh Tuan, Low, Jeremy Yung Shern, Kong, Zhi Hui, Yeo, Kiat Seng, Low, Joshua Yung Lih
Published 2010
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Conference Paper -
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