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Ultra low power design of multi-valued logic circuit for binary interfaces by Mansi Jhamb, Ratnesh Mohan
Published 2022-09-01
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Design, implementation and performance comparison of multiplier topologies in power-delay space by Mansi Jhamb, Garima, Himanshu Lohani
Published 2016-03-01
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A high level implementation and performance evaluation of level-I asynchronous cache on FPGA by Mansi Jhamb, R.K. Sharma, A.K. Gupta
Published 2017-07-01
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