Biometric eneryption fingerprint fuzzy vault for FPGA - based embedded systems / by Rabia Bakhteri, author, Mohamed Khalil Hani, author, IEEE Region Ten International Conferance (2009: Singapore)

Novel chaff generation method for fuzzy vault scheme in biometric encryption / by Mohamed Khalil Hani, author, Rabia Bakhteri, author, International Conference on Computer Engineering and Applications (2nd : 2009 : Indonesia)

Optimal routing algorithm for minimizing interconnect delay in VLSI layout design / by Nasir Shaikh Husin, author, Mohamed Khalil - Hani, author, International Conference on Robotics, Vision, Information and Signal Processing (2007 : Pulau Pinang)

Implementation of sha-512 hash function for adigital signature system on chip in FPGA / by Mohamed Khalil Hani, author, Mohd. Nazrin, author, Yuan, Wen Hau, author, International Conference on Electronic Design (2008: Pulau Pinang)

A tightly coupled finite field arithmetic hardware in an FPGA-based embedded processor core for elliptic curve cryptography / by Mohamed Khalil Hani, author, Arif Irwansyah, 1977-, author, Hau, Yuan Wen, 1980-, author, International Conference on Electronic Design (2008 : Pulau Pinang)

Accelerating the AES eneryption function in openSSL for embedded systems / by Vishnu Paramsivam Nambiar, author, Mohamed Khalil Hani, author, M. Mun'im A. Zabidi, author, International Conference on Electronic Design (2008 : Pulau Pinang)

Hardware acceleration of openSSL cryptographic function for high - performance internet security / by Mohamed Khalil Hani, author, Vishnu Paramasivam, 1984-, author, Muhammad Nadzir Marsono, author, International Conference on Intelligent Systems, Modelling and Simulation (1st: 2009: England)

CODESL : a framework for system - lavel modeling, co - simulation and design - space exploration of embedded systems based on system - on - chip / by Yuan, Wen Hau, author, Mohamed Khalil Hani, author, M. Nadzir Marsono, author, International Conference on Intelligent Systems, Modelling and Simulation (1st : 2009 : England)

Iterative RLC models for interconnect delay optimization in VLSI ruting algorithms / by Zulkifli Md. Yusof, author, Mohamed Khalil Hani, author, N. Shaikh Husin, author, Mohd. Nadzir Marsono, author, Regional sudent comnference on research and development ( 2008 : Johor)