Object-oriented test pattern generator and logic simulator for combinational circuits by Ooi, Chia Yee

Object-oriented test pattern generator and logic simulator for combinational circuits / by 486773 Ooi, Chia Yee

Object-oriented test pattern generator and logic simulator for combinational circuits / [cakera padat] by 486773 Ooi, Chia Yee

Direct digital control application towards controlling speed of DC servomotor / by 486773 Ooi, Chia Yee

A new design-for-testability method based on thru-testability by Ooi, Chia Yee, Fujiwara, Hideo

A new class of sequential circuits with acyclic test generation complexity by Ooi, Chia Yee, Fujiwara, Hideo

Study on test compaction in high-level Automatic Test Pattern Generation (ATPG) platform by Chin, Ayub Abdullah, Ooi, Chia Yee

Thermal model with metal consideration for System-On-Chip testing by Abu Hassan, Hasliza, Ooi, Chia Yee

Development of register transfer level fault simulation platform [electronic resource] / by Liew Shien Pei, 1987-, Ooi, Chia Yee

Implementation of pipelined 8-point fast fourier transform processor [electronic resource] / by Lee, Ung Chuan, author, Ooi, Chia Yee

Cyclic prefix design for orthogonal frequency division multiplexing (OFDM) using FPGA [electronic resource] / by Muhammad Nasir Othman, 1987-, Ooi, Chia Yee

Built-in self test for phase-locked loop / by 391738 Goh, Alvin Shing Chye, Ooi, Chia Yee

Built-in self test for phase-locked loop [electronic resource] / by 391738 Goh, Alvin Shing Chye, Ooi, Chia Yee

Development of digital testing platform for functional and delay test using field programmable gate array [electronic resource] / by Wong, Jia Huey, 1988- , author, Ooi, Chia Yee

Performance comparison of colour correction and colour grading algorithm for medical imaging applications by Mohd Shahrizal Rusli Siti Noorm, Ooi Chia Yee

RtFog: A real-time FPGA-based fog node with remote dynamically reconfigurable application plane for fog analytics redeployment by Tan, Tze Hon, Ooi, Chia Yee, Marsono, Muhammad Nadzir

A nonscan design-for-testability method for register-transfer-level circuits to guarantee linear-depth time expansion models by Fujiwara, Hideo, Iwata, Hiroyuki, Yoneda, Tomokazu, Ooi, Chia Yee

RrBox: a remote dynamically reconfigurable middlebox for network protection by Tan, Tze Hon, Ooi, Chia Yee, Marsono, M. N.

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RrBox: Remote dynamically reconfigurable middlebox using NetFPGA by Tan, Tze Hon, Ooi, Chia Yee, Marsono, M. N.

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An FPGA-based IP core subscription-oriented fog computing platform by Tan, Tze Hon, Ooi, Chia Yee, Marsono, M. N.