Sparse Data Acquisition on Emerging Memory Architectures by Tu-Thach Quach, Sapan Agarwal, Conrad D. James, Matthew J. Marinella, James B. Aimone

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The Impact of Analog-to-Digital Converter Architecture and Variability on Analog Neural Network Accuracy by Matthew Spear, Joshua E. Kim, Christopher H. Bennett, Sapan Agarwal, Matthew J. Marinella, T. Patrick Xiao

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Parallel Matrix Multiplication Using Voltage-Controlled Magnetic Anisotropy Domain Wall Logic by Nicholas Zogbi, Samuel Liu, Christopher H. Bennett, Sapan Agarwal, Matthew J. Marinella, Jean Anne C. Incorvia, T. Patrick Xiao

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Bayesian neural networks using magnetic tunnel junction-based probabilistic in-memory computing by Samuel Liu, T. Patrick Xiao, Jaesuk Kwon, Bert J. Debusschere, Sapan Agarwal, Jean Anne C. Incorvia, Christopher H. Bennett

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Using Floating-Gate Memory to Train Ideal Accuracy Neural Networks by Sapan Agarwal, Diana Garland, John Niroula, Robin B. Jacobs-Gedrim, Alex Hsia, Michael S. Van Heukelom, Elliot Fuller, Bruce Draper, Matthew J. Marinella

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Energy and Performance Benchmarking of a Domain Wall-Magnetic Tunnel Junction Multibit Adder by T. Patrick Xiao, Christopher H. Bennett, Xuan Hu, Ben Feinberg, Robin Jacobs-Gedrim, Sapan Agarwal, John S. Brunhaver, Joseph S. Friedman, Jean Anne C. Incorvia, Matthew J. Marinella

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