Low power asynchronous digital signal processor od Shi, Yiqiong.

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GRACER: graph-based standard cell recognition in IC images for hardware assurance od Huang, Erdong, Hong, Xuenong, Lin, Tong, Shi, Yiqiong, Gwee, Bah Hwee

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A hierarchical multiclassifier system for automated analysis of delayered IC images od Cheng, Deruo, Shi, Yiqiong, Gwee, Bah-Hwee, Toh, Kar-Ann, Lin, Tong

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Delayered IC image analysis with template‐based tanimoto convolution and morphological decision od Cheng, Deruo, Shi, Yiqiong, Lin, Tong, Gwee, Bah Hwee, Toh, Kar‐Ann

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Hybrid K -means clustering and support vector machine method for via and metal line detections in delayered IC images od Cheng, Deruo, Shi, Yiqiong, Lin, Tong, Gwee, Bah-Hwee, Toh, Kar-Ann

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Extracting functional modules from flattened gate-level netlist od Shi, Yiqiong, Gwee, Bah Hwee, Ren, Ye, Phone, Thet Khaing, Ting, Chan Wai

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Unsupervised graph-based image clustering for pretext distribution learning in IC assurance od Tee, Yee Yang, Hong, Xuenong, Cheng, Deruo, Lin, Tong, Shi, Yiqiong, Gwee, Bah Hwee

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A low-voltage micropower asynchronous multiplier with shift-add multiplication approach od Gwee, Bah Hwee, Chang, Joseph Sylvester, Shi, Yiqiong, Chua, Chien Chung, Chong, Kwen-Siong

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Deep Learning-based image analysis framework for hardware assurance of digital integrated circuits od Lin, Tong, Shi, Yiqiong, Shu, Na, Cheng, Deruo, Hong, Xuenong, Song, Jingsi, Gwee, Bah Hwee

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Deep learning-based image analysis framework for hardware assurance of digital integrated circuits od Lin, Tong, Shi, Yiqiong, Shu, Na, Cheng, Deruo, Hong, Xuenong, Song, Jingsi, Gwee, Bah Hwee

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Deep-learning-based X-ray CT slice analysis for layout verification in printed circuit boards od Cheng, Deruo, Shi, Yiqiong, Tee, Yee Yang, Song, Jingsi, Wang, Xue, Wen, Bihan, Gwee, Bah Hwee

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