Mostrando 1 - 20 resultados de 288 para a busca 'Siek, Liter.', tempo de busca: 0.03s
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1
High resolution analog to digital converter por Siek, Liter.
Publicado em 2008
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Fabrication and characterisation of microelectronic devices, circuits and systems III por Siek, Liter.
Publicado em 2008
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Low dropout regulator with temperature coefficient curvature correction topology por Nardi, Utomo, Siek, Liter
Publicado em 2021
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An 80.4% peak power efficiency adaptive supply class H power amplifier for audio applications por Zhang, Xiang, Siek, Liter
Publicado em 2021
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An unclocked analog-to-digital converter por Siek, Liter, Graham, Rigby
Publicado em 2021
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A 0.058 mm2 24 µw temperature sensor in 40 nm cmos process with ± 0.5 ◦c inaccuracy from −55 to 175 ◦c por Zhu, Di, Siek, Liter
Publicado em 2019
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8
A 0.6 V, 1.74 ps resolution capacitively boosted time-to-digital converter in 180 nm CMOS por Palaniappan, Arjun Ramaswami, Siek, Liter
Publicado em 2021
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A 0.0186 mm2, 0.65 V supply, 9.53 ps RMS jitter all-digital PLL for medical implants por Palaniappan, Arjun Ramaswami, Siek, Liter
Publicado em 2021
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Novel edge comparator with input time hysteresis for improved edges arbitration por Teh, Jian Sen, Siek, Liter
Publicado em 2021
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A TDC-less all-digital phase locked loop for medical implant applications por Palaniappan, Arjun Ramaswami, Siek, Liter
Publicado em 2021
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A single-stage dual-output tri-mode AC-DC regulator for inductively powered application por Low, Qiong Wei, Siek, Liter
Publicado em 2021
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Designing a twin frequency control DC-DC buck converter using accurate load current sensing technique por Kok, Chiang Liang, Siek, Liter
Publicado em 2024
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Optional layout of input / output protection devices por Liu, Po Ching., Siek, Liter.
Publicado em 2008
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K-locked-loop and its application in time mode ADC por Hor, Hon Cheong, Siek, Liter
Publicado em 2010
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Wide-input dynamic range 1 MHz clock ultra-low supply flip-flop por Siek, Liter, Palaniappan, Arjun Ramaswami
Publicado em 2018
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Review on VCO based ADC in modern deep submicron CMOS technology por Hor, Hon Cheong, Siek, Liter
Publicado em 2013
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A novel analog-to-residue conversion scheme based on clock overlapping technique por Huang, Qi, Zhu, Di, Siek, Liter
Publicado em 2013
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Conference Paper