Yield-driven iterative robust circuit optimization algorithm by Li, Yan, Stojanovic, Vladimir Marko

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A 4Gb/s/ch 356fJ/b 10mm equalized on-chip interconnect with nonlinear charge-injecting transmit filter and transimpedance receiver in 90nm CMOS by Stojanovic, Vladimir Marko, Kim, Byungsub

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An energy-efficient equalized transceiver for RC-dominant channels by Kim, Byungsub, Stojanovic, Vladimir Marko

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Channel coding for high-speed links: A systematic look at code performance and system simulation by Blitvic, Natasa, Lee, Maxine, Stojanovic, Vladimir Marko

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A fractionally spaced linear receive equalizer with voltage-to-time conversion by Stojanovic, Vladimir Marko, Song, Sanquan, Kim, Byungsub

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Channel coding for high-speed links: A systematic look at code performance and system simulation by Blitvic, Natasa, Stojanovic, Vladimir Marko, Lee, Maxine

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Designing Energy-Efficient Low-Diameter On-chip Networks with Equalized Interconnects by Joshi, Ajay J., Kim, Byungsub, Stojanovic, Vladimir Marko

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Discrete-time, cyclostationary phase-locked loop model for jitter analysis by Vamvakos, Socrates D., Stojanovic, Vladimir Marko, Nikolic, Borivoje

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Guest Editorial for Special Issue on High-Performance Multichip Interconnections by Stojanovic, Vladimir Marko, Yang, Chih-Kong Ken, Ho, Ron

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A modeling and exploration framework for interconnect network design in the nanometer Era by Stojanovic, Vladimir Marko, Chen, Fred Fu-Chin, Joshi, Ajay J.

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An oscilloscope array for high-impedance device characterization by Stojanovic, Vladimir Marko, Chen, Fred Fu-Chin, Chandrakasan, Anantha P.

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A Signal-agnostic Compressed Sensing Acquisition System for Wireless and Implantable Sensors by Chen, Fred Fu-Chin, Chandrakasan, Anantha P., Stojanovic, Vladimir Marko

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A Low-power Area-efficient Switching Scheme for Charge-sharing DACs in SAR ADCs by Chen, Fred Fu-Chin, Chandrakasan, Anantha P., Stojanovic, Vladimir Marko

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Advantages of Silicon Photonics for Multi-socket Systems by Stojanovic, Vladimir Marko, Batten, Christopher, Joshi, Ajay J., Beamer, Scott, Asanovic, Krste

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Manycore processor networks with monolithic integrated CMOS photonics by Stojanovic, Vladimir Marko, Joshi, Ajay J., Batten, Christopher, Kwon, Yong-Jin, Asanovic, Krste

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Silicon-photonic clos networks for global on-chip communication by Stojanovic, Vladimir Marko, Asanovic, Krste, Shamim, Imran, Beamer, Scott, Kwon, Yong-Jin, Batten, Christopher, Joshi, Ajay J.

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Designing manycore processor networks using silicon photonics by Stojanovic, Vladimir Marko, Shamim, Imran, Batten, Christopher, Joshi, Ajay J., Kwon, Yong-Jin, Beamer, Scott, Asanovic, Krste

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CMOS photonic processor-memory networks by Stojanovic, Vladimir Marko, Joshi, Ajay J., Batten, Christopher, Kwon, Yong-Jin, Beamer, Scott, Chen, Sun, Asanovic, Krste

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Design-space exploration for CMOS photonic processor networks by Stojanovic, Vladimir Marko, Joshi, Ajay J., Batten, Christopher, Kwon, Yong-Jin, Beamer, Scott, Chen, Sun, Asanovic, Krste

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Compact Modeling of Nonlinear Analog Circuits using System Identification via Semi-Definite Programming and Robustness Certification by Bond, Bradley N., Mahmood, Zohaib, Li, Yan, Sredojevic, Ranko, Megretski, Alexandre, Stojanovic, Vladimir Marko, Avniel, Yehuda B., Daniel, Luca

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