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Design of synchronous frequency dividers in 5‐nm FinFET CMOS technology by Marcel Kossel, Pier Andrea Francese, Matthias Brändli, Andrea Ruffino, Thomas Morf
Published 2023-12-01
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Experimental Efficiency Evaluation of Stacked Transistor Half-Bridge Topologies in 14 nm CMOS Technology by Pedro André Martins Bezerra, Florian Krismer, Johann Walter Kolar, Riduan Khaddam-Aljameh, Stephan Paredes, Ralph Heller, Thomas Brunschwiler, Pier Andrea Francese, Thomas Morf, Marcel André Kossel, Matthias Braendli
Published 2021-05-01
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