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    Asynchronous logic quasi delay insensitive (QDI) static/dynamic/pass logic transistor-level implementation half/full buffer realization approaches for robust VLSI system

    Asynchronous logic quasi delay insensitive (QDI) static/dynamic/pass logic transistor-level implementation half/full buffer realization approaches for robust VLSI system by Tsui, Yun Kan

    Published 2014
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    Final Year Project (FYP)

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