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    Design of the two-tier MUX in 65 nm SRAM(65 nm SRAM两级多路选择器的设计)

    Design of the two-tier MUX in 65 nm SRAM(65 nm SRAM两级多路选择器的设计) by ZHANGQiang(张强), WUXiao-bo(吴晓波)

    Published 2010-11-01
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