A Buried Thermal Rail (BTR) Technology to Improve Electrothermal Characteristics of Complementary Field-Effect Transistor (CFET) by Zhecheng Pan, Tao Liu, Jingwen Yang, Kun Chen, Saisheng Xu, Chunlei Wu, Min Xu, David Wei Zhang

Get full text

A Novel Scheme for Full Bottom Dielectric Isolation in Stacked Si Nanosheet Gate-All-Around Transistors by Jingwen Yang, Ziqiang Huang, Dawei Wang, Tao Liu, Xin Sun, Lewen Qian, Zhecheng Pan, Saisheng Xu, Chen Wang, Chunlei Wu, Min Xu, David Wei Zhang

Get full text

Impact of Stress and Dimension on Nanosheet Deformation during Channel Release of Gate-All-Around Device by Jingwen Yang, Kun Chen, Dawei Wang, Tao Liu, Xin Sun, Qiang Wang, Ziqiang Huang, Zhecheng Pan, Saisheng Xu, Chen Wang, Chunlei Wu, Min Xu, David Wei Zhang

Get full text