Optimal routing algorithm for minimizing interconnect delay in VLSI layout design /

PRZSL

Bibliographic Details
Main Authors: Nasir Shaikh Husin, author, Mohamed Khalil - Hani, author, International Conference on Robotics, Vision, Information and Signal Processing (2007 : Pulau Pinang)
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Published: Skudai : Universiti Teknologi Malaysia, 2007
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author Nasir Shaikh Husin, author
Mohamed Khalil - Hani, author
International Conference on Robotics, Vision, Information and Signal Processing (2007 : Pulau Pinang)
author_facet Nasir Shaikh Husin, author
Mohamed Khalil - Hani, author
International Conference on Robotics, Vision, Information and Signal Processing (2007 : Pulau Pinang)
author_sort Nasir Shaikh Husin, author
collection OCEAN
description PRZSL
first_indexed 2024-03-04T20:52:26Z
format
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institution Universiti Teknologi Malaysia - OCEAN
language
last_indexed 2024-03-04T20:52:26Z
publishDate 2007
publisher Skudai : Universiti Teknologi Malaysia,
record_format dspace
spelling KOHA-OAI-TEST:1678962020-12-19T17:04:30ZOptimal routing algorithm for minimizing interconnect delay in VLSI layout design / Nasir Shaikh Husin, author Mohamed Khalil - Hani, author International Conference on Robotics, Vision, Information and Signal Processing (2007 : Pulau Pinang) Skudai : Universiti Teknologi Malaysia,2007 PRZSL
spellingShingle Nasir Shaikh Husin, author
Mohamed Khalil - Hani, author
International Conference on Robotics, Vision, Information and Signal Processing (2007 : Pulau Pinang)
Optimal routing algorithm for minimizing interconnect delay in VLSI layout design /
title Optimal routing algorithm for minimizing interconnect delay in VLSI layout design /
title_full Optimal routing algorithm for minimizing interconnect delay in VLSI layout design /
title_fullStr Optimal routing algorithm for minimizing interconnect delay in VLSI layout design /
title_full_unstemmed Optimal routing algorithm for minimizing interconnect delay in VLSI layout design /
title_short Optimal routing algorithm for minimizing interconnect delay in VLSI layout design /
title_sort optimal routing algorithm for minimizing interconnect delay in vlsi layout design
work_keys_str_mv AT nasirshaikhhusinauthor optimalroutingalgorithmforminimizinginterconnectdelayinvlsilayoutdesign
AT mohamedkhalilhaniauthor optimalroutingalgorithmforminimizinginterconnectdelayinvlsilayoutdesign
AT internationalconferenceonroboticsvisioninformationandsignalprocessing2007pulaupinang optimalroutingalgorithmforminimizinginterconnectdelayinvlsilayoutdesign