Analysis of VLSI design for 4bit x 4bit multipliers /
Project Paper (Sarjana Muda Kejuruteraan (Elektrik - Elektronik)) - Universiti Teknologi Malaysia, 2003
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Format: | |
Language: | eng |
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Skudai : Universiti Teknologi Malaysia,
2003
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_version_ | 1796683789498318848 |
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author | 391906 Pu, See Yong |
author_facet | 391906 Pu, See Yong |
author_sort | 391906 Pu, See Yong |
collection | OCEAN |
description | Project Paper (Sarjana Muda Kejuruteraan (Elektrik - Elektronik)) - Universiti Teknologi Malaysia, 2003 |
first_indexed | 2024-03-04T22:02:29Z |
format | |
id | KOHA-OAI-TEST:191041 |
institution | Universiti Teknologi Malaysia - OCEAN |
language | eng |
last_indexed | 2024-03-04T22:02:29Z |
publishDate | 2003 |
publisher | Skudai : Universiti Teknologi Malaysia, |
record_format | dspace |
spelling | KOHA-OAI-TEST:1910412020-12-19T17:05:21ZAnalysis of VLSI design for 4bit x 4bit multipliers / 391906 Pu, See Yong Skudai : Universiti Teknologi Malaysia,2003engProject Paper (Sarjana Muda Kejuruteraan (Elektrik - Elektronik)) - Universiti Teknologi Malaysia, 200316FEELECTL |
spellingShingle | 391906 Pu, See Yong Analysis of VLSI design for 4bit x 4bit multipliers / |
title | Analysis of VLSI design for 4bit x 4bit multipliers / |
title_full | Analysis of VLSI design for 4bit x 4bit multipliers / |
title_fullStr | Analysis of VLSI design for 4bit x 4bit multipliers / |
title_full_unstemmed | Analysis of VLSI design for 4bit x 4bit multipliers / |
title_short | Analysis of VLSI design for 4bit x 4bit multipliers / |
title_sort | analysis of vlsi design for 4bit x 4bit multipliers |
work_keys_str_mv | AT 391906puseeyong analysisofvlsidesignfor4bitx4bitmultipliers |