Verilog for digital design /
16
Main Authors: | , |
---|---|
Format: | |
Language: | eng |
Published: |
New York, NY : Wiley,
2007
|
Subjects: |
_version_ | 1796685702909394944 |
---|---|
author | 204812 Vahid, Frank Lysecky, Roman |
author_facet | 204812 Vahid, Frank Lysecky, Roman |
author_sort | 204812 Vahid, Frank |
collection | OCEAN |
description | 16 |
first_indexed | 2024-03-04T22:30:44Z |
format | |
id | KOHA-OAI-TEST:200480 |
institution | Universiti Teknologi Malaysia - OCEAN |
language | eng |
last_indexed | 2024-03-04T22:30:44Z |
publishDate | 2007 |
publisher | New York, NY : Wiley, |
record_format | dspace |
spelling | KOHA-OAI-TEST:2004802020-12-19T17:05:43ZVerilog for digital design / 204812 Vahid, Frank Lysecky, Roman New York, NY : Wiley,2007eng16PSZJBLVerilog (Computer hardware description language)Electronic digital computersURN:ISBN:9780470052624 (pbk.) |
spellingShingle | Verilog (Computer hardware description language) Electronic digital computers 204812 Vahid, Frank Lysecky, Roman Verilog for digital design / |
title | Verilog for digital design / |
title_full | Verilog for digital design / |
title_fullStr | Verilog for digital design / |
title_full_unstemmed | Verilog for digital design / |
title_short | Verilog for digital design / |
title_sort | verilog for digital design |
topic | Verilog (Computer hardware description language) Electronic digital computers |
work_keys_str_mv | AT 204812vahidfrank verilogfordigitaldesign AT lyseckyroman verilogfordigitaldesign |