Systemverilog for verification : a guide to learning the testbench language features /
16
| Main Author: | |
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| Format: | |
| Language: | eng |
| Published: |
New York, NY : Springer,
2008
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| Subjects: |
| _version_ | 1796688311035625472 |
|---|---|
| author | 402772 Spear, Chris |
| author_facet | 402772 Spear, Chris |
| author_sort | 402772 Spear, Chris |
| collection | OCEAN |
| description | 16 |
| first_indexed | 2024-03-04T23:09:13Z |
| format | |
| id | KOHA-OAI-TEST:213389 |
| institution | Universiti Teknologi Malaysia - OCEAN |
| language | eng |
| last_indexed | 2024-03-04T23:09:13Z |
| publishDate | 2008 |
| publisher | New York, NY : Springer, |
| record_format | dspace |
| spelling | KOHA-OAI-TEST:2133892020-12-19T17:06:14ZSystemverilog for verification : a guide to learning the testbench language features / 402772 Spear, Chris New York, NY : Springer,2008eng16PSZJBLVerilog (Computer hardware description language)Integrated circuitsURN:ISBN:9780387765297 (hbk.) |
| spellingShingle | Verilog (Computer hardware description language) Integrated circuits 402772 Spear, Chris Systemverilog for verification : a guide to learning the testbench language features / |
| title | Systemverilog for verification : a guide to learning the testbench language features / |
| title_full | Systemverilog for verification : a guide to learning the testbench language features / |
| title_fullStr | Systemverilog for verification : a guide to learning the testbench language features / |
| title_full_unstemmed | Systemverilog for verification : a guide to learning the testbench language features / |
| title_short | Systemverilog for verification : a guide to learning the testbench language features / |
| title_sort | systemverilog for verification a guide to learning the testbench language features |
| topic | Verilog (Computer hardware description language) Integrated circuits |
| work_keys_str_mv | AT 402772spearchris systemverilogforverificationaguidetolearningthetestbenchlanguagefeatures |