Digital design of IEEE single precision floating point divider using VHDL implement in FPGA /
Project Paper (Bachelor of Electrical Engineering (Electronics)) - Universiti Teknologi Malaysia, 2003
| 第一著者: | |
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| フォーマット: | |
| 言語: | eng |
| 出版事項: |
Skudai : Universiti Teknologi Malaysia,
2003
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| 主題: |
| _version_ | 1826409910232940544 |
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| author | 426825 Koh, Kai Ngiap |
| author_facet | 426825 Koh, Kai Ngiap |
| author_sort | 426825 Koh, Kai Ngiap |
| collection | OCEAN |
| description | Project Paper (Bachelor of Electrical Engineering (Electronics)) - Universiti Teknologi Malaysia, 2003 |
| first_indexed | 2024-03-05T01:52:20Z |
| format | |
| id | KOHA-OAI-TEST:267630 |
| institution | Universiti Teknologi Malaysia - OCEAN |
| language | eng |
| last_indexed | 2024-03-05T01:52:20Z |
| publishDate | 2003 |
| publisher | Skudai : Universiti Teknologi Malaysia, |
| record_format | dspace |
| spelling | KOHA-OAI-TEST:2676302020-12-19T17:08:31ZDigital design of IEEE single precision floating point divider using VHDL implement in FPGA / 426825 Koh, Kai Ngiap Skudai : Universiti Teknologi Malaysia,2003engProject Paper (Bachelor of Electrical Engineering (Electronics)) - Universiti Teknologi Malaysia, 2003Negative microfilm : MFL 12817 ra575859PRZSLFloating-point arithmeticVHDL (Computer hardware description language) |
| spellingShingle | Floating-point arithmetic VHDL (Computer hardware description language) 426825 Koh, Kai Ngiap Digital design of IEEE single precision floating point divider using VHDL implement in FPGA / |
| title | Digital design of IEEE single precision floating point divider using VHDL implement in FPGA / |
| title_full | Digital design of IEEE single precision floating point divider using VHDL implement in FPGA / |
| title_fullStr | Digital design of IEEE single precision floating point divider using VHDL implement in FPGA / |
| title_full_unstemmed | Digital design of IEEE single precision floating point divider using VHDL implement in FPGA / |
| title_short | Digital design of IEEE single precision floating point divider using VHDL implement in FPGA / |
| title_sort | digital design of ieee single precision floating point divider using vhdl implement in fpga |
| topic | Floating-point arithmetic VHDL (Computer hardware description language) |
| work_keys_str_mv | AT 426825kohkaingiap digitaldesignofieeesingleprecisionfloatingpointdividerusingvhdlimplementinfpga |