APA (7th ed.) Citation

Nasron, 2. S. N. K., Ooi, C. Y., & Elektrik, F. K. (2008). Implementation of ballast methodology in design for testability (DFT) for sequential circuit.

Chicago Style (17th ed.) Citation

Nasron, 262243 Siti Nadiahtul Khairunnisa, Chia Yee Ooi, and Fakulti Kejuruteraan Elektrik. Implementation of Ballast Methodology in Design for Testability (DFT) for Sequential Circuit. 2008.

MLA (9th ed.) Citation

Nasron, 262243 Siti Nadiahtul Khairunnisa, et al. Implementation of Ballast Methodology in Design for Testability (DFT) for Sequential Circuit. 2008.