Starter's guide to verilog 2001 /
16
Main Author: | |
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Format: | |
Language: | eng |
Published: |
Upper Saddle River, NJ : Pearson/Prentice Hall,
2004
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Subjects: |
_version_ | 1796706509155991552 |
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author | 287192 Ciletti, Michael D. |
author_facet | 287192 Ciletti, Michael D. |
author_sort | 287192 Ciletti, Michael D. |
collection | OCEAN |
description | 16 |
first_indexed | 2024-03-05T03:24:42Z |
format | |
id | KOHA-OAI-TEST:298413 |
institution | Universiti Teknologi Malaysia - OCEAN |
language | eng |
last_indexed | 2024-03-05T03:24:42Z |
publishDate | 2004 |
publisher | Upper Saddle River, NJ : Pearson/Prentice Hall, |
record_format | dspace |
spelling | KOHA-OAI-TEST:2984132020-12-19T17:09:52ZStarter's guide to verilog 2001 / 287192 Ciletti, Michael D. Upper Saddle River, NJ : Pearson/Prentice Hall,2004eng16PSZJBLVerilog (Computer hardware description language)Electronic digital computersURN:ISBN:0131415565 (pbk.) |
spellingShingle | Verilog (Computer hardware description language) Electronic digital computers 287192 Ciletti, Michael D. Starter's guide to verilog 2001 / |
title | Starter's guide to verilog 2001 / |
title_full | Starter's guide to verilog 2001 / |
title_fullStr | Starter's guide to verilog 2001 / |
title_full_unstemmed | Starter's guide to verilog 2001 / |
title_short | Starter's guide to verilog 2001 / |
title_sort | starter s guide to verilog 2001 |
topic | Verilog (Computer hardware description language) Electronic digital computers |
work_keys_str_mv | AT 287192cilettimichaeld startersguidetoverilog2001 |