FPGA implementation of ATM chipset : batcher and trap network /

Project Paper (Bachelor of Electrical Engineering) - Universiti Teknologi Malaysia, 1998

Bibliographic Details
Main Author: 369760 Lim, Boon Han
Format:
Language:eng
Published: Sekudai : UTM, 1998
Subjects:
_version_ 1796721971767017472
author 369760 Lim, Boon Han
author_facet 369760 Lim, Boon Han
author_sort 369760 Lim, Boon Han
collection OCEAN
description Project Paper (Bachelor of Electrical Engineering) - Universiti Teknologi Malaysia, 1998
first_indexed 2024-03-05T07:09:24Z
format
id KOHA-OAI-TEST:373199
institution Universiti Teknologi Malaysia - OCEAN
language eng
last_indexed 2024-03-05T07:09:24Z
publishDate 1998
publisher Sekudai : UTM,
record_format dspace
spelling KOHA-OAI-TEST:3731992020-12-19T17:12:59ZFPGA implementation of ATM chipset : batcher and trap network / 369760 Lim, Boon Han Sekudai : UTM,1998engProject Paper (Bachelor of Electrical Engineering) - Universiti Teknologi Malaysia, 199813PRZSLAsynchronous transfer mode
spellingShingle Asynchronous transfer mode
369760 Lim, Boon Han
FPGA implementation of ATM chipset : batcher and trap network /
title FPGA implementation of ATM chipset : batcher and trap network /
title_full FPGA implementation of ATM chipset : batcher and trap network /
title_fullStr FPGA implementation of ATM chipset : batcher and trap network /
title_full_unstemmed FPGA implementation of ATM chipset : batcher and trap network /
title_short FPGA implementation of ATM chipset : batcher and trap network /
title_sort fpga implementation of atm chipset batcher and trap network
topic Asynchronous transfer mode
work_keys_str_mv AT 369760limboonhan fpgaimplementationofatmchipsetbatcherandtrapnetwork