Implementation of a reconfigurable computer : accelerating computation with field - programmable gate arrays [electronic resource] /

Implementation of a reconfigurable computer : accelerating computation with field - programmable gate arrays [electronic resource] /

Project Paper (Sarjana Muda Kejuruteraan (Elektrik - Elektronik)) - Universiti Teknologi Malaysia, 2007

Bibliografische gegevens
Hoofdauteurs:	Vishnu Paramasivam, 1984-, Fakulti Kejuruteraan Elektrik
Formaat:
Gepubliceerd in:	2007
Onderwerpen:	Signal processing Adaptive computing systems High performance computing

Gelijkaardige items

Implementation of a reconfigurable computer : accelerating computation with field - programmable gate arrays /
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Hardware implementation of coordinate rotation digital computer in field programmable gate array /
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Fine- and Coarse-Grain Reconfigurable Computing [electronic resource] /
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Digital signal processing with field programmable gate arrays /
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Digital signal processing with field programmable gate arrays
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Digital beamforming implementation of switch-beam smart antenna system by using integrated digital signal processor and field-programmable gate array [electronic resource] /
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High performance computing in science and engineering '06 : transactions of the High Performance Computing Center Stuttgart (HLRS) 2006 /
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Two-Step Implementation of Sigmoid Function for Artificial Neural Network in Field Programmable Gate Array
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Two-Steps Implementation of Sigmoid Function for Artificial Neural Network in Field Programmable Gate Array
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High performance computing systems and applications /
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Indoor positioning using artificial neural network with field programmable gate array implementation
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Modbus gateway implementation on field programmable gate array /
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High Performance Computing : Modern Systems and Practices /
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Digital signal processing with field programmable gate arrays [electronic resource]: /
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Digital signal processing with field programmable gate arrays [compact disc] /
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Digital signal processing with field programmable gate arrays / [cakera padat]
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Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation /
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Diastolic arrays : throughput-driven reconfigurable computing
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Computational science and high performance computing II : the 2nd Russian-German Advanced Research Workshop : Stuttgart, Germany , March 14 to 16, 2005 /
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Current trends in high performance computing and its applications : proceedings of the International Conference on High Performance Computing and Applications, August 8-10, 2004, Shanghai, P.R. China /
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