Designing network on-chip architectures in the nanoscale era /
Includes bibliographical references and index.
| Main Authors: | , |
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| Format: | |
| Language: | eng |
| Published: |
Boca Raton, FL : Chapman and Hall/CRC,
2011
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| Subjects: |
| _version_ | 1796738250331652096 |
|---|---|
| author | Flich, Jose Bertozzi, Davide |
| author_facet | Flich, Jose Bertozzi, Davide |
| author_sort | Flich, Jose |
| collection | OCEAN |
| description | Includes bibliographical references and index. |
| first_indexed | 2024-03-05T10:59:21Z |
| format | |
| id | KOHA-OAI-TEST:449846 |
| institution | Universiti Teknologi Malaysia - OCEAN |
| language | eng |
| last_indexed | 2024-03-05T10:59:21Z |
| publishDate | 2011 |
| publisher | Boca Raton, FL : Chapman and Hall/CRC, |
| record_format | dspace |
| spelling | KOHA-OAI-TEST:4498462020-12-19T17:16:20ZDesigning network on-chip architectures in the nanoscale era / Flich, Jose Bertozzi, Davide Boca Raton, FL : Chapman and Hall/CRC,2011.engIncludes bibliographical references and index.PSZJBLNetworks on a chip.URN:ISBN:9781439837108 (hardback) |
| spellingShingle | Networks on a chip. Flich, Jose Bertozzi, Davide Designing network on-chip architectures in the nanoscale era / |
| title | Designing network on-chip architectures in the nanoscale era / |
| title_full | Designing network on-chip architectures in the nanoscale era / |
| title_fullStr | Designing network on-chip architectures in the nanoscale era / |
| title_full_unstemmed | Designing network on-chip architectures in the nanoscale era / |
| title_short | Designing network on-chip architectures in the nanoscale era / |
| title_sort | designing network on chip architectures in the nanoscale era |
| topic | Networks on a chip. |
| work_keys_str_mv | AT flichjose designingnetworkonchiparchitecturesinthenanoscaleera AT bertozzidavide designingnetworkonchiparchitecturesinthenanoscaleera |