Floorplaning methodology for network on chip [electronic resource] /

Thesis (Sarjana Kejuruteraan (Elektrik - Komputer dan Sistem Mikroelektronik)) - Universiti Teknologi Malaysia, 2012

Bibliographic Details
Main Author: Chia, Ie Chen, 1981-
Format:
Language:eng
Published: 2012
Subjects:
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author Chia, Ie Chen, 1981-
author_facet Chia, Ie Chen, 1981-
author_sort Chia, Ie Chen, 1981-
collection OCEAN
description Thesis (Sarjana Kejuruteraan (Elektrik - Komputer dan Sistem Mikroelektronik)) - Universiti Teknologi Malaysia, 2012
first_indexed 2024-03-05T12:26:15Z
format
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institution Universiti Teknologi Malaysia - OCEAN
language eng
last_indexed 2024-03-05T12:26:15Z
publishDate 2012
record_format dspace
spelling KOHA-OAI-TEST:4787732020-12-19T17:17:39ZFloorplaning methodology for network on chip [electronic resource] / Chia, Ie Chen, 1981- 2012engThesis (Sarjana Kejuruteraan (Elektrik - Komputer dan Sistem Mikroelektronik)) - Universiti Teknologi Malaysia, 2012Includes bibliographical referencesPSZJBLNEW1Networks on a chip
spellingShingle Networks on a chip
Chia, Ie Chen, 1981-
Floorplaning methodology for network on chip [electronic resource] /
title Floorplaning methodology for network on chip [electronic resource] /
title_full Floorplaning methodology for network on chip [electronic resource] /
title_fullStr Floorplaning methodology for network on chip [electronic resource] /
title_full_unstemmed Floorplaning methodology for network on chip [electronic resource] /
title_short Floorplaning methodology for network on chip [electronic resource] /
title_sort floorplaning methodology for network on chip electronic resource
topic Networks on a chip
work_keys_str_mv AT chiaiechen1981 floorplaningmethodologyfornetworkonchipelectronicresource