The RTL design of 32-bit RISC processor using verilog HDL /
Thesis (Sarjana Kejuruteraan (Elektrik - Komputer dan Sistem Mikroelektronik)) - Universiti Teknologi Malaysia, 2012
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| Language: | eng |
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2012
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| _version_ | 1796744435123355648 |
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| author | Hafizul Hasni Manab, 1987- Muhammad Nasir Ibrahim Fakulti Kejuruteraan Elektrik |
| author_facet | Hafizul Hasni Manab, 1987- Muhammad Nasir Ibrahim Fakulti Kejuruteraan Elektrik |
| author_sort | Hafizul Hasni Manab, 1987- |
| collection | OCEAN |
| description | Thesis (Sarjana Kejuruteraan (Elektrik - Komputer dan Sistem Mikroelektronik)) - Universiti Teknologi Malaysia, 2012 |
| first_indexed | 2024-03-05T12:26:26Z |
| format | |
| id | KOHA-OAI-TEST:478838 |
| institution | Universiti Teknologi Malaysia - OCEAN |
| language | eng |
| last_indexed | 2024-03-05T12:26:26Z |
| publishDate | 2012 |
| record_format | dspace |
| spelling | KOHA-OAI-TEST:4788382020-12-19T17:17:40ZThe RTL design of 32-bit RISC processor using verilog HDL / Hafizul Hasni Manab, 1987- Muhammad Nasir Ibrahim Fakulti Kejuruteraan Elektrik 2012engThesis (Sarjana Kejuruteraan (Elektrik - Komputer dan Sistem Mikroelektronik)) - Universiti Teknologi Malaysia, 2012Includes bibliographical referencesFEELECTLNEW1Reduced instruction set computers |
| spellingShingle | Reduced instruction set computers Hafizul Hasni Manab, 1987- Muhammad Nasir Ibrahim Fakulti Kejuruteraan Elektrik The RTL design of 32-bit RISC processor using verilog HDL / |
| title | The RTL design of 32-bit RISC processor using verilog HDL / |
| title_full | The RTL design of 32-bit RISC processor using verilog HDL / |
| title_fullStr | The RTL design of 32-bit RISC processor using verilog HDL / |
| title_full_unstemmed | The RTL design of 32-bit RISC processor using verilog HDL / |
| title_short | The RTL design of 32-bit RISC processor using verilog HDL / |
| title_sort | rtl design of 32 bit risc processor using verilog hdl |
| topic | Reduced instruction set computers |
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