Synthesizable VHDL design for FPGAs /
Includes bibliographical references
| Main Authors: | , |
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| Format: | |
| Language: | eng |
| Published: |
Cham : Springer ,
c201
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| Subjects: |
| _version_ | 1826460352338984960 |
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| author | Bezerra, Eduardo Augusto Lettnin, Djones Vinicius |
| author_facet | Bezerra, Eduardo Augusto Lettnin, Djones Vinicius |
| author_sort | Bezerra, Eduardo Augusto |
| collection | OCEAN |
| description | Includes bibliographical references |
| first_indexed | 2024-03-05T14:19:57Z |
| format | |
| id | KOHA-OAI-TEST:516432 |
| institution | Universiti Teknologi Malaysia - OCEAN |
| language | eng |
| last_indexed | 2024-03-05T14:19:57Z |
| publishDate | c201 |
| publisher | Cham : Springer , |
| record_format | dspace |
| spelling | KOHA-OAI-TEST:5164322020-12-19T17:19:11ZSynthesizable VHDL design for FPGAs / Bezerra, Eduardo Augusto Lettnin, Djones Vinicius Cham : Springer ,c2014engIncludes bibliographical referencesPSZKLLVHDL (Computer hardware description language)Field programmable gate arraysURN:ISBN:9783319025469 (hbk.) |
| spellingShingle | VHDL (Computer hardware description language) Field programmable gate arrays Bezerra, Eduardo Augusto Lettnin, Djones Vinicius Synthesizable VHDL design for FPGAs / |
| title | Synthesizable VHDL design for FPGAs / |
| title_full | Synthesizable VHDL design for FPGAs / |
| title_fullStr | Synthesizable VHDL design for FPGAs / |
| title_full_unstemmed | Synthesizable VHDL design for FPGAs / |
| title_short | Synthesizable VHDL design for FPGAs / |
| title_sort | synthesizable vhdl design for fpgas |
| topic | VHDL (Computer hardware description language) Field programmable gate arrays |
| work_keys_str_mv | AT bezerraeduardoaugusto synthesizablevhdldesignforfpgas AT lettnindjonesvinicius synthesizablevhdldesignforfpgas |