APA (7th ed.) Citation

Sahar Z. Alawey, 1. a., A'ain, A. K., & Elektrik, F. K. (2014). Gate oxide short (gos) defect modeling based on 32 nm CMOS process.

Chicago Style (17th ed.) Citation

Sahar Z. Alawey, 1972- author, Abu Khairi A'ain, and Fakulti Kejuruteraan Elektrik. Gate Oxide Short (gos) Defect Modeling Based on 32 Nm CMOS Process. 2014.

MLA (9th ed.) Citation

Sahar Z. Alawey, 1972- author, et al. Gate Oxide Short (gos) Defect Modeling Based on 32 Nm CMOS Process. 2014.