Implementation of full systolic-array architecture on FPGA for image filtering application /

Implementation of full systolic-array architecture on FPGA for image filtering application /

Project Paper (Sarjana Muda Kejuruteraan Sistem Elektronik) - Universiti Teknologi Malaysia, 2015

Dades bibliogràfiques
Autors principals:	Tew, Yan Fen, 1991-, Nordinah Ismail, supervisor, Institut Teknologi Antarabangsa Malaysia-Jepun
Format:
Idioma:	eng
Publicat:	2015
Matèries:	Systolic array circuits

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