An enhanced low latency network-on-chip router optimized for prototyping on field programmable gate array /

Samankaltaisia teoksia

• An enhanced low latency network-on-chip router optimized for prototyping on field programmable gate array /
  Tekijä: Alireza Monemi, 1983-, author 511782, et al.
  Julkaistu: (2016)
• Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique
  Tekijä: Alireza Monemi, et al.
  Julkaistu: (2015-01-01)
• Adaptive proportional-integral-derivative controller on field programmable gate array /
  Tekijä: Prak Yut Ee Luan, 1983-, author 642188, et al.
  Julkaistu: (2016)
• A low latency NoC router supporting routing adaptivity /
  Tekijä: Gwee, Yong Chun, 1982-, et al.
  Julkaistu: (2012)
• Adaptive proportional-integral-derivative controller on field programmable gate array [electronic resource] /
  Tekijä: Prak Yut Ee Luan, 1983- 642188, et al.
  Julkaistu: (2016)