Device simulation of the electrical characteristics in 14nm gaussian channel junctionless finfet /

Device simulation of the electrical characteristics in 14nm gaussian channel junctionless finfet /

Show other versions (1)

Bibliographic Details
Main Authors:	Mathangi Ramakrishnan, 1997-, author 644901, Nurul Ezaila Alias, supervisor 227744, Muhammad Afiq Nurudin Hamzah, 1988-, supervisor 567050, Fakulti Kejuruteraan. Sekolah Kejuruteraan Elektrik 619066
Format:	text
Language:	eng
Published:	Johor Bahru, Johor : Universiti Teknologi Malaysia, 2022
Online Access:	http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:149119

Similar Items

Device simulation of the electrical characteristics in 14nm gaussian channel junctionless finfet /
by: Mathangi Ramakrishnan, 1997-, author 644901
Published: (2022)

Design and analysis of electrical characteristics of 14nm SOI-based trigate gaussian channel junctionless FinFET
by: Ramakrishnan, Mathangi, et al.
Published: (2023)

Performance analysis of 14nm SOI-based Trigate Gaussian Channel Junctionless FinFET with punchthrough stop layer
by: Ramakrishnan, Mathangi, et al.
Published: (2023)

Device simulation of the electrical characteristics in 14nm gaussian channel junctionless finfet
by: Ramakrishnan, Mathangi
Published: (2022)

Performance analysis of an efficient montgomery multiplier using 7nm FinFET and junctionless FinFET
by: Mathangi, R., et al.
Published: (2021)

Statistical variability in 14NM soi finfet device in the presence of random discrete dopants /
by: Rahimah Hassan, 1992-, author 646943, et al.
Published: (2017)

Statistical variability in 14NM soi finfet device in the presence of random discrete dopants [electronic resource] /
by: Rahimah Hassan, 1992-, author 646943, et al.
Published: (2017)

Performance evaluation of 22NM FinFET based 6-T SRAM cell /
by: Fikri Haziq Azmi, 1994-, author, et al.
Published: (2017)

Performance analysis of 22NM FinFET-based 8T SRAM cell /
by: Nur Hasnifa Hasan Baseri, 1992-, author, et al.
Published: (2018)

Performance analysis of 22NM FinFET-based 8T SRAM cell /
by: Nur Hasnifa Hasan Baseri, 1992-, author, et al.
Published: (2018)

Optimization of progress parameters for lower leakage current in 10 NM finfet using taguchi method /
by: Loy, Ying Ting, 1994-, author 629617, et al.
Published: (2020)

Performance evaluation of silicon-on-insulator junctionless transistor based 6T and 8T sram cells /
by: Muhammad Faris Md. Noor, 1996-, author, et al.
Published: (2019)

Performance evaluation of silicon-on-insulator junctionless transistor based 6T and 8T sram cells /
by: Muhammad Faris Md. Noor, 1996-, author, et al.
Published: (2019)

Parameter variations of 20NM GAAS junctionless-gate-all-around field-effect transistor with quantum mechanical effects /
by: Muhammad Faidzal Mohamad Rasol, 1996-, author 622246, et al.
Published: (2021)

Impact of device parameter variation on the performance of n-type junctionless nanowire transistor with high-k dielectrics /
by: Mohammed Adamu Sule, 1984-, author, et al.
Published: (2019)

Impact of device parameter variation on the performance of n-type junctionless nanowire transistor with high-k dielectrics /
by: Mohammed Adamu Sule, 1984-, author, et al.
Published: (2019)

Reliability analysis of junctionless fin field effect transistor (JL-FinFET)
by: Hamzah, Muhammad Naziiruddin
Published: (2022)

Impact of device parameter variation on the electrical characteristic of n-type junctionless nanowire transistor with high-k dielectrics
by: Sule, Mohammed Adamu, et al.
Published: (2020)

Optimization of 20nm junctionless nanowire transistor using Taguchi method for higher drive current with strained /
by: Nurul Liyana Nasuha Omar, 1996-, author, et al.
Published: (2019)

Optimization of 20nm junctionless nanowire transistor using Taguchi method for higher drive current with strained /
by: Nurul Liyana Nasuha Omar, 1996-, author, et al.
Published: (2019)

Relliability behaviors of HCI and NBTI on 3-D planar mosfet and novel finfet/
by: Rahimah Hassan, 1992-, et al.
Published: (2016)

Low-power and high performance of an optimized finfet based 8T SRAM cell design /
by: Teh, Chew Suan, 1994- , author, et al.
Published: (2018)

Comprehensive analysis of gate oxide short in junctionless fin field effect transistor
by: Rahman, Md. Wahidur, et al.
Published: (2022)

Performance analysis of junctionless multi-bridge channel FET with strained SiGe application
by: Affandi, S. Afidah, et al.
Published: (2022)

Charge-based compact model of gate-all-around floating gate nanowire with variable oxide thickness for flash memory cell /
by: Muhammad Afiq Nurudin Hamzah, 1988-, author, et al.
Published: (2018)

Performance evaluation of finfet silicide based contact through electrical simulation /
by: Muhammad Adli Aini 1994- author 633499, et al.
Published: (2021)

Study of time-dependent dielectric breakdown (TDDB) in 15MM junctionless FinFET
by: Chng, Sze Lyn
Published: (2022)

InGaAs Junctionless FinFETs With Self-Aligned Ni-InGaAs S/D
by: Po-Chun Chang, et al.
Published: (2018-01-01)

Explicit continuous models of drain current, terminal charges and intrinsic capacitance for a long-channel junctionless nanowire transistor
by: Hamzah, Afiq, et al.
Published: (2019)

The development of vertical mosfet model incorporating a dielectric pocket /
by: 227744 Nurul Ezaila Alias, et al.
Published: (2009)

The development of vertical mosfet model incorporating a dielectric pocket /
by: 227744 Nurul Ezaila Alias, et al.
Published: (2009)

Explicit charge-based model for strained-silicon gate-all-around mosfet including quantum and short channel effects /
by: Fatimah Khairiah Abd. Hamid, 1988-, author 560361, et al.
Published: (2020)

Contribution to the Physical Modelling of Single Charged Defects Causing the Random Telegraph Noise in Junctionless FinFET
by: Atabek E. Atamuratov, et al.
Published: (2020-08-01)

Variable oxide thickness optimization and reliability analysis of gate-all-around floating gate for flash memory cell /
by: Farah A. Hamid, 1990-, author 644819, et al.
Published: (2020)

Finfet circuit modelling using hspice /
by: Nor Hafizah Roslan, 1989- , author, et al.
Published: (2012)

Sub-10-nm Asymmetric Junctionless Tunnel Field-Effect Transistors
by: Chun-Hsing Shih, et al.
Published: (2014-01-01)

Low power and high performance of optimized finfet based 8t sram cell design
by: Alias, Nurul Ezaila, et al.
Published: (2018)

Study on threshold voltage shifts and reliability in PFETs by high-voltage on-state and off-state stress [electronic resource] /
by: 227744 Nurul Ezaila Alias, et al.
Published: (2013)

Study on threshold voltage shifts and reliability in PFETs by high-voltage on-state and off-state stress /
by: 227744 Nurul Ezaila Alias, et al.
Published: (2013)

Device modelling of archimedean spiral graphene nanoscroll field-effect-transistor /
by: Muhammad Afiq Nurudin Hamzah, 1988- author, et al.
Published: (2014)