Resource Efficient LDPC Decoders : From Algorithms to Hardware Architectures /
This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight...
| Main Authors: | , , |
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| Format: | software, multimedia |
| Language: | eng |
| Published: |
London : Academic Press, an imprint of Elsevier,
2018
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| Online Access: | https://www.sciencedirect.com/science/book/9780128112557 |
| _version_ | 1796764989658234880 |
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| author | Chandrasetty, Vikram Arkalgud, author 649815 Aziz, Syed Mahfuzul, author 649816 ScienceDirect (Online service) 7722 |
| author_facet | Chandrasetty, Vikram Arkalgud, author 649815 Aziz, Syed Mahfuzul, author 649816 ScienceDirect (Online service) 7722 |
| author_sort | Chandrasetty, Vikram Arkalgud, author 649815 |
| collection | OCEAN |
| description | This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms. The reader will learn: Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementationHow to reduce computational complexity and power consumption using computer aided design techniquesAll aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs. |
| first_indexed | 2024-03-05T17:17:56Z |
| format | software, multimedia |
| id | KOHA-OAI-TEST:605676 |
| institution | Universiti Teknologi Malaysia - OCEAN |
| language | eng |
| last_indexed | 2024-03-05T17:17:56Z |
| publishDate | 2018 |
| publisher | London : Academic Press, an imprint of Elsevier, |
| record_format | dspace |
| spelling | KOHA-OAI-TEST:6056762023-07-27T02:17:32ZResource Efficient LDPC Decoders : From Algorithms to Hardware Architectures / Chandrasetty, Vikram Arkalgud, author 649815 Aziz, Syed Mahfuzul, author 649816 ScienceDirect (Online service) 7722 software, multimedia Electronic books 631902 London : Academic Press, an imprint of Elsevier,©20182018engThis book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms. The reader will learn: Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementationHow to reduce computational complexity and power consumption using computer aided design techniquesAll aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs.Includes bibliographical references and index Chapter 1. Introduction -- Chapter 2. Overview of LDPC codes -- Chapter 3. Structure and flexibility of LDPC codes -- Chapter 4. LDPC decoding algorithms -- Chapter 5. LDPC decoder architectures -- Chapter 6. Hardware implementation of LDPC decoders -- Chapter 7. LDPC decoders in multimedia communication -- Chapter 8. Prospective LDPC applications.This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms. The reader will learn: Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementationHow to reduce computational complexity and power consumption using computer aided design techniquesAll aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs.Decoders (Electronics) Digital communications https://www.sciencedirect.com/science/book/9780128112557URN:ISBN:9780128112557Remote access restricted to users with a valid UTM ID via VPN. |
| spellingShingle | Decoders (Electronics) Digital communications Chandrasetty, Vikram Arkalgud, author 649815 Aziz, Syed Mahfuzul, author 649816 ScienceDirect (Online service) 7722 Resource Efficient LDPC Decoders : From Algorithms to Hardware Architectures / |
| title | Resource Efficient LDPC Decoders : From Algorithms to Hardware Architectures / |
| title_full | Resource Efficient LDPC Decoders : From Algorithms to Hardware Architectures / |
| title_fullStr | Resource Efficient LDPC Decoders : From Algorithms to Hardware Architectures / |
| title_full_unstemmed | Resource Efficient LDPC Decoders : From Algorithms to Hardware Architectures / |
| title_short | Resource Efficient LDPC Decoders : From Algorithms to Hardware Architectures / |
| title_sort | resource efficient ldpc decoders from algorithms to hardware architectures |
| topic | Decoders (Electronics) Digital communications |
| url | https://www.sciencedirect.com/science/book/9780128112557 |
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