Architecture-level power-time-area estimator for IEEE 1149.1 structure in testing interconnet resources of network-on-chip /

Architecture-level power-time-area estimator for IEEE 1149.1 structure in testing interconnet resources of network-on-chip /

Bibliographic Details
Main Authors:	Mahdieh Nadi Senejani, 1982-, author, Muhammad Nadzir Marsono, supervisor 642192, Ooi, Chia Yee, supervisor, Fakulti Kejuruteraan Elektrik 540663
Format:	text
Language:	eng
Published:	Johor Bahru, Johor : Universiti Teknologi Malaysia

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