Implementation of image compression algorithm using field programmable gate array (FPGA) /

Thesis (Master of Engineering (Electrical)) - Universiti Teknologi Malaysia, 1999

গ্রন্থ-পঞ্জীর বিবরন
প্রধান লেখক: 323411 Zulfakar Aspar
বিন্যাস: text
ভাষা:eng
প্রকাশিত: Skudai : Universiti Teknologi Malaysia, 1999
বিষয়গুলি:
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author 323411 Zulfakar Aspar
author_facet 323411 Zulfakar Aspar
author_sort 323411 Zulfakar Aspar
collection OCEAN
description Thesis (Master of Engineering (Electrical)) - Universiti Teknologi Malaysia, 1999
first_indexed 2024-03-04T15:52:13Z
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institution Universiti Teknologi Malaysia - OCEAN
language eng
last_indexed 2024-03-04T15:52:13Z
publishDate 1999
publisher Skudai : Universiti Teknologi Malaysia,
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spelling KOHA-OAI-TEST:678502022-09-25T06:35:27ZImplementation of image compression algorithm using field programmable gate array (FPGA) / 323411 Zulfakar Aspar textSkudai : Universiti Teknologi Malaysia,1999engThesis (Master of Engineering (Electrical)) - Universiti Teknologi Malaysia, 1999FEELECTLField programmable gate arraysImage compressionImage processing
spellingShingle Field programmable gate arrays
Image compression
Image processing
323411 Zulfakar Aspar
Implementation of image compression algorithm using field programmable gate array (FPGA) /
title Implementation of image compression algorithm using field programmable gate array (FPGA) /
title_full Implementation of image compression algorithm using field programmable gate array (FPGA) /
title_fullStr Implementation of image compression algorithm using field programmable gate array (FPGA) /
title_full_unstemmed Implementation of image compression algorithm using field programmable gate array (FPGA) /
title_short Implementation of image compression algorithm using field programmable gate array (FPGA) /
title_sort implementation of image compression algorithm using field programmable gate array fpga
topic Field programmable gate arrays
Image compression
Image processing
work_keys_str_mv AT 323411zulfakaraspar implementationofimagecompressionalgorithmusingfieldprogrammablegatearrayfpga