Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing /

Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing /

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Thesis (Sarjana Kejuruteraan (Elektrik)) - Universiti Teknologi Malaysia, 2007

Bibliographic Details
Main Author: Ch'ng, Heng Sun
Format:
Language:eng
Published: Skudai : Universiti Teknologi Malaysia, 2007
Subjects:
Graph algorithms
Online Access:http://www.psz.utm.my/sla/billing/login.asp?mid=50973

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