Verilog design of input / output processor with built-in-self-test /
Thesis (Sarjana Kejuruteraan (Elektrik - Komputer dan Mikroelektronik)) - Fakulti Kejuruteraan Elektrik, Universiti Teknologi Malaysia, 2007
Main Author: | 425851 Goh, Keng Hoo |
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Format: | |
Language: | eng |
Published: |
Skudai : Universiti Teknologi Malaysia,
2007
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Subjects: | |
Online Access: | http://www.psz.utm.my/sla/billing/login.asp?mid=49217 |
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