Implementation study of field programmable gate array (FPGA) and complex programmable logic device (CPLD) in collision avoidance system using vhsic hardware description language (VHDL)
A collision avoidance system, also known as a pre-crash system, forward collision warning system, or collision mitigation system, is a sophisticated driver-assistance system that aims to avoid or mitigate the severity of a collision. For this research, collision avoidance system will be fabricating...
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Format: | Article |
Language: | English |
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Penerbit UMP
2021
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Online Access: | http://umpir.ump.edu.my/id/eprint/33666/1/Implementation%20study%20of%20field%20programmable%20gate%20array.pdf |
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author | Mohammad Naqiuddin Fahmi, Fathli Zulkifli, Md. Yusof |
author_facet | Mohammad Naqiuddin Fahmi, Fathli Zulkifli, Md. Yusof |
author_sort | Mohammad Naqiuddin Fahmi, Fathli |
collection | UMP |
description | A collision avoidance system, also known as a pre-crash system, forward collision warning system, or collision mitigation system, is a sophisticated driver-assistance system that aims to avoid or mitigate the severity of a collision. For this research, collision avoidance system will be fabricating to show that this system can detect avoidance range before apply the braking action to prevent collision. The ultrasonic sensor will be used in this system to detect the avoidance range. In this collision avoidance system, there will be uses of Field Programmable Gate Array (FPGA) and Complex Programmable Logic Device (CPLD). This research will observe how to implement FPGA and CPLD in the collision avoidance system using VHSIC Hardware Description Language (VHDL). The VHDL will be done in Quartus II 15.0 Software. In this research, Terasic DE-10 Standard board has been used. It contains FPGA microcontroller model Cyclone V SoC 5CSXFC6D6F31C6N. Max II board is used because it contains CPLD microcontroller model EPM240T100C5. |
first_indexed | 2024-03-06T12:56:01Z |
format | Article |
id | UMPir33666 |
institution | Universiti Malaysia Pahang |
language | English |
last_indexed | 2024-03-06T12:56:01Z |
publishDate | 2021 |
publisher | Penerbit UMP |
record_format | dspace |
spelling | UMPir336662022-04-11T02:38:11Z http://umpir.ump.edu.my/id/eprint/33666/ Implementation study of field programmable gate array (FPGA) and complex programmable logic device (CPLD) in collision avoidance system using vhsic hardware description language (VHDL) Mohammad Naqiuddin Fahmi, Fathli Zulkifli, Md. Yusof TJ Mechanical engineering and machinery TK Electrical engineering. Electronics Nuclear engineering A collision avoidance system, also known as a pre-crash system, forward collision warning system, or collision mitigation system, is a sophisticated driver-assistance system that aims to avoid or mitigate the severity of a collision. For this research, collision avoidance system will be fabricating to show that this system can detect avoidance range before apply the braking action to prevent collision. The ultrasonic sensor will be used in this system to detect the avoidance range. In this collision avoidance system, there will be uses of Field Programmable Gate Array (FPGA) and Complex Programmable Logic Device (CPLD). This research will observe how to implement FPGA and CPLD in the collision avoidance system using VHSIC Hardware Description Language (VHDL). The VHDL will be done in Quartus II 15.0 Software. In this research, Terasic DE-10 Standard board has been used. It contains FPGA microcontroller model Cyclone V SoC 5CSXFC6D6F31C6N. Max II board is used because it contains CPLD microcontroller model EPM240T100C5. Penerbit UMP 2021 Article PeerReviewed pdf en cc_by_nc_4 http://umpir.ump.edu.my/id/eprint/33666/1/Implementation%20study%20of%20field%20programmable%20gate%20array.pdf Mohammad Naqiuddin Fahmi, Fathli and Zulkifli, Md. Yusof (2021) Implementation study of field programmable gate array (FPGA) and complex programmable logic device (CPLD) in collision avoidance system using vhsic hardware description language (VHDL). Mekatronika - Journal of Intelligent Manufacturing & Mechatronics, 3 (1). pp. 52-60. ISSN 2637-0883. (Published) https://doi.org/10.15282/mekatronika.v3i1.7152 https://doi.org/10.15282/mekatronika.v3i1.7152 |
spellingShingle | TJ Mechanical engineering and machinery TK Electrical engineering. Electronics Nuclear engineering Mohammad Naqiuddin Fahmi, Fathli Zulkifli, Md. Yusof Implementation study of field programmable gate array (FPGA) and complex programmable logic device (CPLD) in collision avoidance system using vhsic hardware description language (VHDL) |
title | Implementation study of field programmable gate array (FPGA) and complex programmable logic device (CPLD) in collision avoidance system using vhsic hardware description language (VHDL) |
title_full | Implementation study of field programmable gate array (FPGA) and complex programmable logic device (CPLD) in collision avoidance system using vhsic hardware description language (VHDL) |
title_fullStr | Implementation study of field programmable gate array (FPGA) and complex programmable logic device (CPLD) in collision avoidance system using vhsic hardware description language (VHDL) |
title_full_unstemmed | Implementation study of field programmable gate array (FPGA) and complex programmable logic device (CPLD) in collision avoidance system using vhsic hardware description language (VHDL) |
title_short | Implementation study of field programmable gate array (FPGA) and complex programmable logic device (CPLD) in collision avoidance system using vhsic hardware description language (VHDL) |
title_sort | implementation study of field programmable gate array fpga and complex programmable logic device cpld in collision avoidance system using vhsic hardware description language vhdl |
topic | TJ Mechanical engineering and machinery TK Electrical engineering. Electronics Nuclear engineering |
url | http://umpir.ump.edu.my/id/eprint/33666/1/Implementation%20study%20of%20field%20programmable%20gate%20array.pdf |
work_keys_str_mv | AT mohammadnaqiuddinfahmifathli implementationstudyoffieldprogrammablegatearrayfpgaandcomplexprogrammablelogicdevicecpldincollisionavoidancesystemusingvhsichardwaredescriptionlanguagevhdl AT zulkiflimdyusof implementationstudyoffieldprogrammablegatearrayfpgaandcomplexprogrammablelogicdevicecpldincollisionavoidancesystemusingvhsichardwaredescriptionlanguagevhdl |