Selective harmonic elimination using MFO for a reduced switch multi-level inverter topology

This research article proposed a new modified single-phase multi-level inverter topology with an optimal switching control strategy to reduce the inverter output harmonic distortion. The topology is configured to operate in asymmetric mode to generate eleven levels of output voltage steps. Additiona...

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Bibliographic Details
Main Authors: Shanono, Ibrahim Haruna, Nor Rul Hasma, Abdullah, Hamdan, Daniyal, Aisha, Muhammad
Format: Conference or Workshop Item
Language:English
English
Published: Institute of Electrical and Electronics Engineers Inc. 2022
Subjects:
Online Access:http://umpir.ump.edu.my/id/eprint/39411/1/Selective%20Harmonic%20Elimination%20using%20MFO%20for%20a%20Reduced%20Switch.pdf
http://umpir.ump.edu.my/id/eprint/39411/2/Selective%20harmonic%20elimination%20using%20MFO%20for%20a%20reduced%20switch%20multi-level%20inverter%20topology_ABS.pdf
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Summary:This research article proposed a new modified single-phase multi-level inverter topology with an optimal switching control strategy to reduce the inverter output harmonic distortion. The topology is configured to operate in asymmetric mode to generate eleven levels of output voltage steps. Additionally, a selective harmonic elimination technique has been deployed to minimize the switching loss and EMI. The Moth Flame Optimization (MFO) algorithm is deployed to compute the optimal switching angles. The proposed MLI topology is simulated in PSIM software using the optimized switching angles. The inverter performance parameters such as the total harmonic distortion (THD), harmonic amplitudes, switching, and conduction losses, were also analyzed and reported. The topology total harmonic distortion is 2.4%, hence satisfying the IEEE 519 standard.