A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation
Multipliers are among the most critical arithmetic functional units in many applications, and those applications commonly require many multiplications which result in significant power consumption. For applications that have error tolerance, employing an approximate multiplier is an emerging method...
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| Format: | Article |
| Language: | English |
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IEEE
2022-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/9785598/ |
| _version_ | 1828150126655307776 |
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| author | Fang-Yi Gu Ing-Chao Lin Jia-Wei Lin |
| author_facet | Fang-Yi Gu Ing-Chao Lin Jia-Wei Lin |
| author_sort | Fang-Yi Gu |
| collection | DOAJ |
| description | Multipliers are among the most critical arithmetic functional units in many applications, and those applications commonly require many multiplications which result in significant power consumption. For applications that have error tolerance, employing an approximate multiplier is an emerging method to reduce critical path delay and power consumption. An approximate multiplier can trade off accuracy for lower energy and higher performance. In this paper, we not only propose an approximate 4-2 compressor with high accuracy, but also an adjustable approximate multiplier that can dynamically truncate partial products to achieve variable accuracy requirements. In addition, we also propose a simple error compensation circuit to reduce error distance. The proposed approximate multiplier can adjust the accuracy and power required for multiplications at run-time based on the users’ requirement. Experimental results show that the delay and the average power consumption of the proposed adjustable approximate multiplier can be reduced by 27% and 40.33% (up to 72%) when compared to the Wallace tree multiplier. Moreover, we demonstrate the suitability and reconfigurability of our proposed multiplier in convolutional neural networks (CNNs) to meet different requirements at each layer. |
| first_indexed | 2024-04-11T21:39:54Z |
| format | Article |
| id | doaj.art-01c53bc2527a408bb1101f42731aebc5 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-04-11T21:39:54Z |
| publishDate | 2022-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-01c53bc2527a408bb1101f42731aebc52022-12-22T04:01:37ZengIEEEIEEE Access2169-35362022-01-0110604476045810.1109/ACCESS.2022.31791129785598A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable TruncationFang-Yi Gu0https://orcid.org/0000-0001-5523-470XIng-Chao Lin1https://orcid.org/0000-0003-1994-7512Jia-Wei Lin2Department of Computer Science and Information, National Cheng Kung University, Tainan, TaiwanDepartment of Computer Science and Information, National Cheng Kung University, Tainan, TaiwanDepartment of Computer Science and Information, National Cheng Kung University, Tainan, TaiwanMultipliers are among the most critical arithmetic functional units in many applications, and those applications commonly require many multiplications which result in significant power consumption. For applications that have error tolerance, employing an approximate multiplier is an emerging method to reduce critical path delay and power consumption. An approximate multiplier can trade off accuracy for lower energy and higher performance. In this paper, we not only propose an approximate 4-2 compressor with high accuracy, but also an adjustable approximate multiplier that can dynamically truncate partial products to achieve variable accuracy requirements. In addition, we also propose a simple error compensation circuit to reduce error distance. The proposed approximate multiplier can adjust the accuracy and power required for multiplications at run-time based on the users’ requirement. Experimental results show that the delay and the average power consumption of the proposed adjustable approximate multiplier can be reduced by 27% and 40.33% (up to 72%) when compared to the Wallace tree multiplier. Moreover, we demonstrate the suitability and reconfigurability of our proposed multiplier in convolutional neural networks (CNNs) to meet different requirements at each layer.https://ieeexplore.ieee.org/document/9785598/Approximate computingapproximate multiplierCNN acceleratordeep learninghigh precisionreconfigurable approximate design |
| spellingShingle | Fang-Yi Gu Ing-Chao Lin Jia-Wei Lin A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation IEEE Access Approximate computing approximate multiplier CNN accelerator deep learning high precision reconfigurable approximate design |
| title | A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation |
| title_full | A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation |
| title_fullStr | A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation |
| title_full_unstemmed | A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation |
| title_short | A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation |
| title_sort | low power and high accuracy approximate multiplier with reconfigurable truncation |
| topic | Approximate computing approximate multiplier CNN accelerator deep learning high precision reconfigurable approximate design |
| url | https://ieeexplore.ieee.org/document/9785598/ |
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