An adjustable 0.3 V current winner‐take‐all circuit for analogue neural networks
Abstract This letter presents an upgraded winner‐take‐all (WTA) circuit that is capable of operating under low‐voltage supplies. The proposed circuit re‐configures the basic loop of a conventional WTA through an auxiliary transistor to decrease the dropped voltage across the tail current. This recon...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
Wiley
2021-08-01
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| Series: | Electronics Letters |
| Subjects: | |
| Online Access: | https://doi.org/10.1049/ell2.12156 |
| _version_ | 1811210217348661248 |
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| author | Meysam Akbari Ting‐I Chou Kea‐Tiong Tang |
| author_facet | Meysam Akbari Ting‐I Chou Kea‐Tiong Tang |
| author_sort | Meysam Akbari |
| collection | DOAJ |
| description | Abstract This letter presents an upgraded winner‐take‐all (WTA) circuit that is capable of operating under low‐voltage supplies. The proposed circuit re‐configures the basic loop of a conventional WTA through an auxiliary transistor to decrease the dropped voltage across the tail current. This reconfiguration creates an additional biasing voltage providing more adjustability. Moreover, the new feedback path decreases the delay compared to the conventional WTA. Both conventional and proposed WTAs were fabricated in the TSMC 0.18 μm CMOS technology. The experimental results show a 29.4 and 33.2 μs reduction in rising and falling times, respectively, for the proposed WTA under a supply voltage of 0.3 V. |
| first_indexed | 2024-04-12T04:51:58Z |
| format | Article |
| id | doaj.art-01d54254ad4048e3a31cf5821b8e06d9 |
| institution | Directory Open Access Journal |
| issn | 0013-5194 1350-911X |
| language | English |
| last_indexed | 2024-04-12T04:51:58Z |
| publishDate | 2021-08-01 |
| publisher | Wiley |
| record_format | Article |
| series | Electronics Letters |
| spelling | doaj.art-01d54254ad4048e3a31cf5821b8e06d92022-12-22T03:47:16ZengWileyElectronics Letters0013-51941350-911X2021-08-01571868568710.1049/ell2.12156An adjustable 0.3 V current winner‐take‐all circuit for analogue neural networksMeysam Akbari0Ting‐I Chou1Kea‐Tiong Tang2Faculty of Electrical Engineering National Tsing Hua University (NTHU) Hsinchu TaiwanFaculty of Electrical Engineering National Tsing Hua University (NTHU) Hsinchu TaiwanFaculty of Electrical Engineering National Tsing Hua University (NTHU) Hsinchu TaiwanAbstract This letter presents an upgraded winner‐take‐all (WTA) circuit that is capable of operating under low‐voltage supplies. The proposed circuit re‐configures the basic loop of a conventional WTA through an auxiliary transistor to decrease the dropped voltage across the tail current. This reconfiguration creates an additional biasing voltage providing more adjustability. Moreover, the new feedback path decreases the delay compared to the conventional WTA. Both conventional and proposed WTAs were fabricated in the TSMC 0.18 μm CMOS technology. The experimental results show a 29.4 and 33.2 μs reduction in rising and falling times, respectively, for the proposed WTA under a supply voltage of 0.3 V.https://doi.org/10.1049/ell2.12156CMOS integrated circuits |
| spellingShingle | Meysam Akbari Ting‐I Chou Kea‐Tiong Tang An adjustable 0.3 V current winner‐take‐all circuit for analogue neural networks Electronics Letters CMOS integrated circuits |
| title | An adjustable 0.3 V current winner‐take‐all circuit for analogue neural networks |
| title_full | An adjustable 0.3 V current winner‐take‐all circuit for analogue neural networks |
| title_fullStr | An adjustable 0.3 V current winner‐take‐all circuit for analogue neural networks |
| title_full_unstemmed | An adjustable 0.3 V current winner‐take‐all circuit for analogue neural networks |
| title_short | An adjustable 0.3 V current winner‐take‐all circuit for analogue neural networks |
| title_sort | adjustable 0 3 v current winner take all circuit for analogue neural networks |
| topic | CMOS integrated circuits |
| url | https://doi.org/10.1049/ell2.12156 |
| work_keys_str_mv | AT meysamakbari anadjustable03vcurrentwinnertakeallcircuitforanalogueneuralnetworks AT tingichou anadjustable03vcurrentwinnertakeallcircuitforanalogueneuralnetworks AT keationgtang anadjustable03vcurrentwinnertakeallcircuitforanalogueneuralnetworks AT meysamakbari adjustable03vcurrentwinnertakeallcircuitforanalogueneuralnetworks AT tingichou adjustable03vcurrentwinnertakeallcircuitforanalogueneuralnetworks AT keationgtang adjustable03vcurrentwinnertakeallcircuitforanalogueneuralnetworks |