Classic McEliece on the ARM Cortex-M4

This paper presents a constant-time implementation of Classic McEliece for ARM Cortex-M4. Specifically, our target platform is stm32f4-Discovery, a development board on which the amount of SRAM is not even large enough to hold the public key of the smallest parameter sets of Classic McEliece. Fortun...

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Main Authors: Ming-Shing Chen, Tung Chou
Format: Article
Language:English
Published: Ruhr-Universität Bochum 2021-07-01
Series:Transactions on Cryptographic Hardware and Embedded Systems
Subjects:
Online Access:https://tches.iacr.org/index.php/TCHES/article/view/8970
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author Ming-Shing Chen
Tung Chou
author_facet Ming-Shing Chen
Tung Chou
author_sort Ming-Shing Chen
collection DOAJ
description This paper presents a constant-time implementation of Classic McEliece for ARM Cortex-M4. Specifically, our target platform is stm32f4-Discovery, a development board on which the amount of SRAM is not even large enough to hold the public key of the smallest parameter sets of Classic McEliece. Fortunately, the flash memory is large enough, so we use it to store the public key. For the level-1 parameter sets mceliece348864 and mceliece348864f, our implementation takes 582 199 cycles for encapsulation and 2 706 681 cycles for decapsulation. Compared to the level-1 parameter set of FrodoKEM, our encapsulation time is more than 80 times faster, and our decapsulation time is more than 17 times faster. For the level-3 parameter sets mceliece460896 and mceliece460896f, our implementation takes 1 081 335 cycles for encapsulation and 6 535 186 cycles for decapsulation. In addition, our implementation is also able to carry out key generation for the level-1 parameter sets and decapsulation for level-5 parameter sets on the board.
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spelling doaj.art-0233b61918d243c8879ce7cd92a5f36b2022-12-21T23:16:16ZengRuhr-Universität BochumTransactions on Cryptographic Hardware and Embedded Systems2569-29252021-07-012021310.46586/tches.v2021.i3.125-148Classic McEliece on the ARM Cortex-M4Ming-Shing Chen0Tung Chou1Ruhr University Bochum, Bochum, GermanyAcademia Sinica, Taipei, TaiwanThis paper presents a constant-time implementation of Classic McEliece for ARM Cortex-M4. Specifically, our target platform is stm32f4-Discovery, a development board on which the amount of SRAM is not even large enough to hold the public key of the smallest parameter sets of Classic McEliece. Fortunately, the flash memory is large enough, so we use it to store the public key. For the level-1 parameter sets mceliece348864 and mceliece348864f, our implementation takes 582 199 cycles for encapsulation and 2 706 681 cycles for decapsulation. Compared to the level-1 parameter set of FrodoKEM, our encapsulation time is more than 80 times faster, and our decapsulation time is more than 17 times faster. For the level-3 parameter sets mceliece460896 and mceliece460896f, our implementation takes 1 081 335 cycles for encapsulation and 6 535 186 cycles for decapsulation. In addition, our implementation is also able to carry out key generation for the level-1 parameter sets and decapsulation for level-5 parameter sets on the board.https://tches.iacr.org/index.php/TCHES/article/view/8970Classic McElieceCortex-M4Constant-time implementationsNIST PQC standardization
spellingShingle Ming-Shing Chen
Tung Chou
Classic McEliece on the ARM Cortex-M4
Transactions on Cryptographic Hardware and Embedded Systems
Classic McEliece
Cortex-M4
Constant-time implementations
NIST PQC standardization
title Classic McEliece on the ARM Cortex-M4
title_full Classic McEliece on the ARM Cortex-M4
title_fullStr Classic McEliece on the ARM Cortex-M4
title_full_unstemmed Classic McEliece on the ARM Cortex-M4
title_short Classic McEliece on the ARM Cortex-M4
title_sort classic mceliece on the arm cortex m4
topic Classic McEliece
Cortex-M4
Constant-time implementations
NIST PQC standardization
url https://tches.iacr.org/index.php/TCHES/article/view/8970
work_keys_str_mv AT mingshingchen classicmcelieceonthearmcortexm4
AT tungchou classicmcelieceonthearmcortexm4