Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications
In this study, for the very first time developing of n- and p-type 3-D single-channel (SC) FinFET and gate-all-around (GAA) Multi-Bridge-Channel FETs (MBCFET) like nanowire FET (NWFET) and nanosheet FET (NSFET) are benchmarked towards device and circuit levels which are emulated with International R...
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| Format: | Article |
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IEEE
2024-01-01
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| Series: | IEEE Access |
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| Online Access: | https://ieeexplore.ieee.org/document/10382496/ |
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| author | Vakkalakula Bharath Sreenivasulu Aruna Kumari Neelam Asisa Kumar Panigrahy Lokesh Vakkalakula Jawar Singh Shiv Govind Singh |
| author_facet | Vakkalakula Bharath Sreenivasulu Aruna Kumari Neelam Asisa Kumar Panigrahy Lokesh Vakkalakula Jawar Singh Shiv Govind Singh |
| author_sort | Vakkalakula Bharath Sreenivasulu |
| collection | DOAJ |
| description | In this study, for the very first time developing of n- and p-type 3-D single-channel (SC) FinFET and gate-all-around (GAA) Multi-Bridge-Channel FETs (MBCFET) like nanowire FET (NWFET) and nanosheet FET (NSFET) are benchmarked towards device and circuit levels which are emulated with International Road map for Devices and Systems (IRDS) for sub-5-nm technology nodes. Compared to the FinFET, the MBCFETs exhibits higher ON-current (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {ON}})$ </tex-math></inline-formula>, switching ratio (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {ON}}/I_{\mathrm {OFF}})$ </tex-math></inline-formula>, lower subthreshold-swing (SS) and drain-induced barrier lowering (DIBL). Except for extended parasitic capacitances (<inline-formula> <tex-math notation="LaTeX">$C_{\mathrm {para}})$ </tex-math></inline-formula>, our benchmarking results show that the NWFET and NSFET achieve the high-performance (HP) and low-power (LP) goals of IRDS. Furthermore, the NSFET delivers superior performance towards DC and analog/RF metrics. The cut-off frequency (<inline-formula> <tex-math notation="LaTeX">$f_{\mathrm {T}})$ </tex-math></inline-formula> and gain bandwidth product (GBW) are higher (because of high <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {ON}})$ </tex-math></inline-formula> in the case of NSFET, even though the capacitive effect is significant. Further, the logic circuit applications like CMOS inverter and ring oscillator (RO) circuits are analyzed and compared in detail. The CMOS inverters propagation delays (<inline-formula> <tex-math notation="LaTeX">$\tau _{\mathrm {p}})$ </tex-math></inline-formula> is reduced to 31% from FinFET to NWFET and 12% from NWFET to NSFETs is noticed. Also, the NWFET and NSFET based ROs offer 39% and 56% high oscillation frequency (<inline-formula> <tex-math notation="LaTeX">$f_{\mathrm {osc}})$ </tex-math></inline-formula> compared to that of FinFET counterpart. Finally, the single stage current mirror performance and operational transconductance amplifiers (OTA) gain and common mode rejection ratio (CMRR) are carried out towards analog and mixed-mode circuit applications. |
| first_indexed | 2024-03-08T12:52:57Z |
| format | Article |
| id | doaj.art-04a5449e12ad4c829e8e453319955ee2 |
| institution | Directory Open Access Journal |
| issn | 2169-3536 |
| language | English |
| last_indexed | 2024-03-08T12:52:57Z |
| publishDate | 2024-01-01 |
| publisher | IEEE |
| record_format | Article |
| series | IEEE Access |
| spelling | doaj.art-04a5449e12ad4c829e8e453319955ee22024-01-20T00:02:22ZengIEEEIEEE Access2169-35362024-01-01127531753910.1109/ACCESS.2024.335077910382496Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit ApplicationsVakkalakula Bharath Sreenivasulu0https://orcid.org/0000-0003-3064-1522Aruna Kumari Neelam1https://orcid.org/0000-0003-1703-8876Asisa Kumar Panigrahy2https://orcid.org/0000-0002-9491-5310Lokesh Vakkalakula3Jawar Singh4https://orcid.org/0000-0002-6351-9884Shiv Govind Singh5https://orcid.org/0000-0001-7319-879XSchool of Electronics and Communication Engineering, REVA University, Bengaluru, Karnataka, IndiaSchool of Electronics Engineering, Vellore Institute of Technology, Vellore, IndiaDepartment of ECE, Faculty of Science and Technology (Icfaitech), ICFAI Foundation for Higher Education, Hyderabad, IndiaBosch Global Software Technologies, Bengaluru, Karnataka, IndiaDepartment of Electrical Engineering, Indian Institute of Technology Patna, Patna, IndiaDepartment of Electrical Engineering, Indian Institute of Technology Hyderabad, Hyderabad, IndiaIn this study, for the very first time developing of n- and p-type 3-D single-channel (SC) FinFET and gate-all-around (GAA) Multi-Bridge-Channel FETs (MBCFET) like nanowire FET (NWFET) and nanosheet FET (NSFET) are benchmarked towards device and circuit levels which are emulated with International Road map for Devices and Systems (IRDS) for sub-5-nm technology nodes. Compared to the FinFET, the MBCFETs exhibits higher ON-current (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {ON}})$ </tex-math></inline-formula>, switching ratio (<inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {ON}}/I_{\mathrm {OFF}})$ </tex-math></inline-formula>, lower subthreshold-swing (SS) and drain-induced barrier lowering (DIBL). Except for extended parasitic capacitances (<inline-formula> <tex-math notation="LaTeX">$C_{\mathrm {para}})$ </tex-math></inline-formula>, our benchmarking results show that the NWFET and NSFET achieve the high-performance (HP) and low-power (LP) goals of IRDS. Furthermore, the NSFET delivers superior performance towards DC and analog/RF metrics. The cut-off frequency (<inline-formula> <tex-math notation="LaTeX">$f_{\mathrm {T}})$ </tex-math></inline-formula> and gain bandwidth product (GBW) are higher (because of high <inline-formula> <tex-math notation="LaTeX">$I_{\mathrm {ON}})$ </tex-math></inline-formula> in the case of NSFET, even though the capacitive effect is significant. Further, the logic circuit applications like CMOS inverter and ring oscillator (RO) circuits are analyzed and compared in detail. The CMOS inverters propagation delays (<inline-formula> <tex-math notation="LaTeX">$\tau _{\mathrm {p}})$ </tex-math></inline-formula> is reduced to 31% from FinFET to NWFET and 12% from NWFET to NSFETs is noticed. Also, the NWFET and NSFET based ROs offer 39% and 56% high oscillation frequency (<inline-formula> <tex-math notation="LaTeX">$f_{\mathrm {osc}})$ </tex-math></inline-formula> compared to that of FinFET counterpart. Finally, the single stage current mirror performance and operational transconductance amplifiers (OTA) gain and common mode rejection ratio (CMRR) are carried out towards analog and mixed-mode circuit applications.https://ieeexplore.ieee.org/document/10382496/CMRRCMOS inverterIRDSGAAFEToperational transconductance amplifier (OTA)ring oscillator |
| spellingShingle | Vakkalakula Bharath Sreenivasulu Aruna Kumari Neelam Asisa Kumar Panigrahy Lokesh Vakkalakula Jawar Singh Shiv Govind Singh Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications IEEE Access CMRR CMOS inverter IRDS GAAFET operational transconductance amplifier (OTA) ring oscillator |
| title | Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications |
| title_full | Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications |
| title_fullStr | Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications |
| title_full_unstemmed | Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications |
| title_short | Benchmarking of Multi-Bridge-Channel FETs Toward Analog and Mixed-Mode Circuit Applications |
| title_sort | benchmarking of multi bridge channel fets toward analog and mixed mode circuit applications |
| topic | CMRR CMOS inverter IRDS GAAFET operational transconductance amplifier (OTA) ring oscillator |
| url | https://ieeexplore.ieee.org/document/10382496/ |
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