Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study
State-of-the-art modern microprocessor and domain-specific accelerator designs are dominated by data-paths composed of regular structures, also known as bit-slices. Random logic placement and routing techniques may not result in an optimal layout for these data-path-dominated designs. As a result, i...
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| Format: | Article |
| Language: | English |
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MDPI AG
2022-09-01
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| Series: | Electronics |
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| Online Access: | https://www.mdpi.com/2079-9292/11/18/2965 |
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| author | Dhilleswararao Pudi Samuel Jigme Harrison Dimitrios Stathis Srinivas Boppu Ahmed Hemani Linga Reddy Cenkeramaddi |
| author_facet | Dhilleswararao Pudi Samuel Jigme Harrison Dimitrios Stathis Srinivas Boppu Ahmed Hemani Linga Reddy Cenkeramaddi |
| author_sort | Dhilleswararao Pudi |
| collection | DOAJ |
| description | State-of-the-art modern microprocessor and domain-specific accelerator designs are dominated by data-paths composed of regular structures, also known as bit-slices. Random logic placement and routing techniques may not result in an optimal layout for these data-path-dominated designs. As a result, implementation tools such as Cadence’s Innovus include a Structured Data-Path (SDP) feature that allows data-path placement to be completely customized by constraining the placement engine. A relative placement file is used to provide these constraints to the tool. However, the tool neither extracts nor automatically places the regular data-path structures. In other words, the relative placement file is not automatically generated. In this paper, we propose a semi-automated method for extracting bit-slices from the Innovus SDP flow. It has been demonstrated that the proposed method results in 17% less density or use for a pixel buffer design. At the same time, the other performance metrics are unchanged when compared to the traditional place and route flow. |
| first_indexed | 2024-03-10T00:10:44Z |
| format | Article |
| id | doaj.art-05142ef3e8f54baa9788d2e4e61e1470 |
| institution | Directory Open Access Journal |
| issn | 2079-9292 |
| language | English |
| last_indexed | 2024-03-10T00:10:44Z |
| publishDate | 2022-09-01 |
| publisher | MDPI AG |
| record_format | Article |
| series | Electronics |
| spelling | doaj.art-05142ef3e8f54baa9788d2e4e61e14702023-11-23T15:59:40ZengMDPI AGElectronics2079-92922022-09-011118296510.3390/electronics11182965Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case StudyDhilleswararao Pudi0Samuel Jigme Harrison1Dimitrios Stathis2Srinivas Boppu3Ahmed Hemani4Linga Reddy Cenkeramaddi5School of Electrical Sciences, Indian Institute of Technology Bhubhaneswar (IITBBS), Bhuabaneswar 752050, Odisha, IndiaST Microelectronics Asia Pte. Ltd., Singapore 554574, SingaporeSchool of Electrical Engineering and Computer Science, Royal Institute of Technology (KTH), Stockholm 16640, SwedenSchool of Electrical Sciences, Indian Institute of Technology Bhubhaneswar (IITBBS), Bhuabaneswar 752050, Odisha, IndiaSchool of Electrical Engineering and Computer Science, Royal Institute of Technology (KTH), Stockholm 16640, SwedenDepartment of Information and Communication Technology, University of Agder, 4879 Grimstad, NorwayState-of-the-art modern microprocessor and domain-specific accelerator designs are dominated by data-paths composed of regular structures, also known as bit-slices. Random logic placement and routing techniques may not result in an optimal layout for these data-path-dominated designs. As a result, implementation tools such as Cadence’s Innovus include a Structured Data-Path (SDP) feature that allows data-path placement to be completely customized by constraining the placement engine. A relative placement file is used to provide these constraints to the tool. However, the tool neither extracts nor automatically places the regular data-path structures. In other words, the relative placement file is not automatically generated. In this paper, we propose a semi-automated method for extracting bit-slices from the Innovus SDP flow. It has been demonstrated that the proposed method results in 17% less density or use for a pixel buffer design. At the same time, the other performance metrics are unchanged when compared to the traditional place and route flow.https://www.mdpi.com/2079-9292/11/18/2965data-pathplacementroutinginnovuselectronic design automationphysical design |
| spellingShingle | Dhilleswararao Pudi Samuel Jigme Harrison Dimitrios Stathis Srinivas Boppu Ahmed Hemani Linga Reddy Cenkeramaddi Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study Electronics data-path placement routing innovus electronic design automation physical design |
| title | Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study |
| title_full | Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study |
| title_fullStr | Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study |
| title_full_unstemmed | Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study |
| title_short | Methodology for Structured Data-Path Implementation in VLSI Physical Design: A Case Study |
| title_sort | methodology for structured data path implementation in vlsi physical design a case study |
| topic | data-path placement routing innovus electronic design automation physical design |
| url | https://www.mdpi.com/2079-9292/11/18/2965 |
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