Two‐timescale design for RIS‐aided full‐duplex MIMO systems with transceiver hardware impairments
Abstract This paper focuses on a reconfigurable intelligent surface (RIS)‐aided full‐duplex multi‐user massive multiple‐input multiple‐output system with transceiver hardware impairments (THWIs). Different from the existing works, the two‐timescale design scheme is considered. The phase shift at the...
Main Authors: | , , , |
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Format: | Article |
Language: | English |
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Wiley
2023-01-01
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Series: | IET Communications |
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Online Access: | https://doi.org/10.1049/cmu2.12515 |
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author | Jianxin Dai Feng Zhu Cunhua Pan Jiangzhou Wang |
author_facet | Jianxin Dai Feng Zhu Cunhua Pan Jiangzhou Wang |
author_sort | Jianxin Dai |
collection | DOAJ |
description | Abstract This paper focuses on a reconfigurable intelligent surface (RIS)‐aided full‐duplex multi‐user massive multiple‐input multiple‐output system with transceiver hardware impairments (THWIs). Different from the existing works, the two‐timescale design scheme is considered. The phase shift at the RIS is designed only based on the statistical channel state information. Firstly, the closed‐form expression of the uplink and downlink achievable rate is derived. Then, the power scaling laws are revealed. Finally, the impact of THWIs on the system performance is analysed and genetic algorithm to maximize the achievable rate is used. |
first_indexed | 2024-04-11T03:39:30Z |
format | Article |
id | doaj.art-0566a3c395c2408982cd093f326ec369 |
institution | Directory Open Access Journal |
issn | 1751-8628 1751-8636 |
language | English |
last_indexed | 2024-04-11T03:39:30Z |
publishDate | 2023-01-01 |
publisher | Wiley |
record_format | Article |
series | IET Communications |
spelling | doaj.art-0566a3c395c2408982cd093f326ec3692023-01-02T04:00:44ZengWileyIET Communications1751-86281751-86362023-01-011719810910.1049/cmu2.12515Two‐timescale design for RIS‐aided full‐duplex MIMO systems with transceiver hardware impairmentsJianxin Dai0Feng Zhu1Cunhua Pan2Jiangzhou Wang3School of Science Nanjing University of Posts and Telecommunications Nanjing ChinaCollege of Telecommunications and Information Engineering Nanjing University of Posts and Telecommunications Nanjing ChinaNational Mobile Communications Research Laboratory Southeast University Nanjing ChinaSchool of Engineering University of Kent Canterbury UKAbstract This paper focuses on a reconfigurable intelligent surface (RIS)‐aided full‐duplex multi‐user massive multiple‐input multiple‐output system with transceiver hardware impairments (THWIs). Different from the existing works, the two‐timescale design scheme is considered. The phase shift at the RIS is designed only based on the statistical channel state information. Firstly, the closed‐form expression of the uplink and downlink achievable rate is derived. Then, the power scaling laws are revealed. Finally, the impact of THWIs on the system performance is analysed and genetic algorithm to maximize the achievable rate is used.https://doi.org/10.1049/cmu2.12515hardware impairmentsintelligent reflection surfacereconfigurable intelligent surfacetwo‐timescale design |
spellingShingle | Jianxin Dai Feng Zhu Cunhua Pan Jiangzhou Wang Two‐timescale design for RIS‐aided full‐duplex MIMO systems with transceiver hardware impairments IET Communications hardware impairments intelligent reflection surface reconfigurable intelligent surface two‐timescale design |
title | Two‐timescale design for RIS‐aided full‐duplex MIMO systems with transceiver hardware impairments |
title_full | Two‐timescale design for RIS‐aided full‐duplex MIMO systems with transceiver hardware impairments |
title_fullStr | Two‐timescale design for RIS‐aided full‐duplex MIMO systems with transceiver hardware impairments |
title_full_unstemmed | Two‐timescale design for RIS‐aided full‐duplex MIMO systems with transceiver hardware impairments |
title_short | Two‐timescale design for RIS‐aided full‐duplex MIMO systems with transceiver hardware impairments |
title_sort | two timescale design for ris aided full duplex mimo systems with transceiver hardware impairments |
topic | hardware impairments intelligent reflection surface reconfigurable intelligent surface two‐timescale design |
url | https://doi.org/10.1049/cmu2.12515 |
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